#
# Copyright (c) Red Hat, 2014.
# Contributed by William Cohen <wcohen@redhat.com>
#
# ARM Cortex A57 events
# From Cortex A57 TRM
#
include:arm/armv8-pmuv3-common
event:0x40 um:zero minimum:10007 name:L1D_CACHE_LD : Level 1 data cache access - Read
event:0x41 um:zero minimum:10007 name:L1D_CACHE_ST : Level 1 data cache access - Write
event:0x42 um:zero minimum:10007 name:L1D_CACHE_REFILL_LD : Level 1 data cache refill - Read
event:0x43 um:zero minimum:10007 name:L1D_CACHE_REFILL_ST : Level 1 data cache refill - Write
event:0x46 um:zero minimum:10007 name:L1D_CACHE_WB_VICTIM : Level 1 data cache Write-back - Victim
event:0x47 um:zero minimum:10007 name:L1D_CACHE_WB_CLEAN : Level 1 data cache Write-back - Cleaning event:and coherency
event:0x48 um:zero minimum:10007 name:L1D_CACHE_INVAL : Level 1 data cache invalidate
event:0x4C um:zero minimum:10007 name:L1D_TLB_REFILL_LD : Level 1 data TLB refill - Read
event:0x4D um:zero minimum:10007 name:L1D_TLB_REFILL_ST : Level 1 data TLB refill - Write
event:0x50 um:zero minimum:10007 name:L2D_CACHE_LD : Level 2 data cache access - Read
event:0x51 um:zero minimum:10007 name:L2D_CACHE_ST : Level 2 data cache access - Write
event:0x52 um:zero minimum:10007 name:L2D_CACHE_REFILL_LD : Level 2 data cache refill - Read
event:0x53 um:zero minimum:10007 name:L2D_CACHE_REFILL_ST : Level 2 data cache refill - Write
event:0x56 um:zero minimum:10007 name:L2D_CACHE_WB_VICTIM : Level 2 data cache Write-back - Victim
event:0x57 um:zero minimum:10007 name:L2D_CACHE_WB_CLEAN : Level 2 data cache Write-back - Cleaning and coherency
event:0x58 um:zero minimum:10007 name:L2D_CACHE_INVAL : Level 2 data cache invalidate
event:0x60 um:zero minimum:10007 name:BUS_ACCESS_LD : Bus access - Read
event:0x61 um:zero minimum:10007 name:BUS_ACCESS_ST : Bus access - Write
event:0x62 um:zero minimum:10007 name:BUS_ACCESS_SHARED : Bus access - Normal
event:0x63 um:zero minimum:10007 name:BUS_ACCESS_NOT_SHARED : Bus access - Not normal
event:0x64 um:zero minimum:10007 name:BUS_ACCESS_NORMAL : Bus access - Normal
event:0x65 um:zero minimum:10007 name:BUS_ACCESS_PERIPH : Bus access - Peripheral
event:0x66 um:zero minimum:10007 name:MEM_ACCESS_LD : Data memory access - Read
event:0x67 um:zero minimum:10007 name:MEM_ACCESS_ST : Data memory access - Write
event:0x68 um:zero minimum:10007 name:UNALIGNED_LD_SPEC : Unaligned access - Read
event:0x69 um:zero minimum:10007 name:UNALIGNED_ST_SPEC : Unaligned access - Write
event:0x6A um:zero minimum:10007 name:UNALIGNED_LDST_SPEC : Unaligned access
event:0x6C um:zero minimum:10007 name:LDREX_SPEC : Exclusive operation speculatively executed - LDREX
event:0x6D um:zero minimum:10007 name:STREX_PASS_SPEC : Exclusive instruction speculatively executed - STREX pass
event:0x6E um:zero minimum:10007 name:STREX_FAIL_SPEC : Exclusive operation speculatively executed - STREX fail
event:0x70 um:zero minimum:10007 name:LD_SPEC : Operation speculatively executed - Load
event:0x71 um:zero minimum:10007 name:ST_SPEC : Operation speculatively executed - Store
event:0x72 um:zero minimum:10007 name:LDST_SPEC : Operation speculatively executed - Load or store
event:0x73 um:zero minimum:10007 name:DP_SPEC : Operation speculatively executed - Integer data processing
event:0x74 um:zero minimum:10007 name:ASE_SPEC : Operation speculatively executed - Advanced SIMD
event:0x75 um:zero minimum:10007 name:VFP_SPEC : Operation speculatively executed - VFP
event:0x76 um:zero minimum:10007 name:PC_WRITE_SPEC : Operation speculatively executed - Software change of the PC
event:0x77 um:zero minimum:10007 name:CRYPTO_SPEC : Operation speculatively executed, crypto data processing
event:0x78 um:zero minimum:10007 name:BR_IMMED_SPEC : Branch speculatively executed - Immediate branch
event:0x79 um:zero minimum:10007 name:BR_RETURN_SPEC : Branch speculatively executed - Procedure return
event:0x7A um:zero minimum:10007 name:BR_INDIRECT_SPEC : Branch speculatively executed - Indirect branch
event:0x7C um:zero minimum:10007 name:ISB_SPEC : Barrier speculatively executed - ISB
event:0x7D um:zero minimum:10007 name:DSB_SPEC : Barrier speculatively executed - DSB
event:0x7E um:zero minimum:10007 name:DMB_SPEC : Barrier speculatively executed - DMB
event:0x81 um:zero minimum:10007 name:EXC_UNDEF : Exception taken, other synchronous
event:0x82 um:zero minimum:10007 name:EXC_SVC : Exception taken, Supervisor Call
event:0x83 um:zero minimum:10007 name:EXC_PABORT : Exception taken, Instruction Abort
event:0x84 um:zero minimum:10007 name:EXC_DABORT : Exception taken, Data Abort or SError
event:0x86 um:zero minimum:10007 name:EXC_IRQ : Exception taken, IRQ
event:0x87 um:zero minimum:10007 name:EXC_FIQ : Exception taken, FIQ
event:0x88 um:zero minimum:10007 name:EXC_SMC : Exception taken, Secure Monitor Call
event:0x8A um:zero minimum:10007 name:EXC_HVC : Exception taken, Hypervisor Call
event:0x8B um:zero minimum:10007 name:EXC_TRAP_PABORT : Exception taken, Instruction Abort not taken locally
event:0x8C um:zero minimum:10007 name:EXC_TRAP_DABORT : Exception taken, Data Abort, or SError not taken locally
event:0x8D um:zero minimum:10007 name:EXC_TRAP_OTHER : Exception taken – Other traps not taken locally
event:0x8E um:zero minimum:10007 name:EXC_TRAP_IRQ : Exception taken, IRQ not taken locally
event:0x8F um:zero minimum:10007 name:EXC_TRAP_FIQ : Exception taken, FIQ not taken locally
event:0x90 um:zero minimum:10007 name:RC_LD_SPEC : Release consistency instruction speculatively executed – Load-Acquire
event:0x91 um:zero minimum:10007 name:RC_ST_SPEC : Release consistency instruction speculatively executed – Store-Release
