//   Qucs analogue mux4to1 model
//   The structure and theoretical background to the mux4to1
//   Verilog-a model are presented in the Qucs digital tutorial.
//
//   This is free software; you can redistribute it and/or modify
//   it under the terms of the GNU General Public License as published by
//   the Free Software Foundation; either version 2, or (at your option)
//   any later version.
// 
//   Copyright (C), Mike Brinson, mbrin72043@yahoo.co.uk, November 2008.
//
`include "disciplines.vams"
`include "constants.vams"
module mux4to1 (EN, A, B, D0, D1,D2, D3, Y); 
 inout EN, A, B, D0, D1, D2, D3, Y;
 electrical EN, A, B, D0, D1, D2, D3, Y;
 electrical n1, n2;
//
 `define attr(txt) (*txt*)
 parameter real TR=6 from [1.0:20.0] `attr(info="transfer function high scaling factor");
 parameter real Delay = 1e-9 from [0: inf] `attr(info="output delay" unit="s");
//
 real Rd, Ccc, In1, VAI, VBI;
//
analog begin
@(initial_model)
  begin
    Rd = 1e3;
    Ccc= Delay*1.43/Rd;
  end
VAI = (1-V(A));
VBI = (1-V(B));
In1 = (1-V(EN))*(V(D3)*V(B)*V(A)+V(D2)*V(B)*VAI+V(D1)*VBI*V(A)+V(D0)*VBI*VAI);
I(n1) <+ -0.5*(1+tanh(TR*(In1-0.5)));
I(n1) <+ V(n1);
I(n1, n2) <+ V(n1,n2)/Rd;
I(n2) <+ ddt(Ccc*V(n2));
I(Y)  <+ -V(n2);
I(Y) <+ V(Y);
end
endmodule
