%FILENAME%
verilator-3.922-1-armv7h.pkg.tar.xz

%NAME%
verilator

%VERSION%
3.922-1

%DESC%
The fastest free Verilog HDL simulator

%CSIZE%
2008764

%ISIZE%
10142720

%MD5SUM%
f17394e6cf84fd29eaffa255fe9c1004

%SHA256SUM%
1e1c7a96af489bf7d0569b03149f992e6572b98b095b80326132db3c63daf2b8

%PGPSIG%
iQIzBAABCAAdFiEEaLNTfzmjE7PldNBndxk/FSvb5qYFAlrZl9sACgkQdxk/FSvb5qYhvxAAuOwueRCBrItLCUYIt6gbvxYI2Fj+boY+iYIZDWdX9Lf9NmrNA9FvGIRFZKSOeua7LgSoQLQwEBg1fPbZQtqqT7RkchyI9Ue2kAWj3E5XPZXlAQRcBpDpUZ0ZbmawJIz0Z8tnYZ/LYTzC8IspOe79N/avyaRzzwYGo/b6Gfa30ZZQdJCFdll6QunLSGdTqz7CSuYjp1NCPxAAj1JryIMKaBUtcBvTxMUJA939gucVWIbhffqwAxrb/61+6NxZivwY1OlxkxcHxT23Wh8t9JrX5dEvRA/76rxB0WIAZIzj/RPTu+V/eUz426DIwGGP4n3p09cCjmRNw/xk2yMXfBD43Lp6NVvDeLlYdzeGYxp7uCEgGAg9Pgyr6ESZJwvD7bxAFONM85YmLGeLMdnqUScCS4/FzrPbeqGNwSpWXyhldfUlurfVlap2kRTTrgh1ddBxgINy8dC0z4FImYj0EKcJGniw+S+uYqDyhVaeEM/TX1bm8MAY5Bck8UsgjWDWhQW3vIQBAWXOXsjLkO8ZiS4do5jveSB02SfdHdtWAmca0smpoN3jZsDZGLd/47D5e7X7aQSMNsG0TzkqNbMGuOZ59ayehiofSQT9zs9E3+Iz9pu1r9fhVoGcBGG7d+frPH0+m3yp3zKV4/A9D3DCUtFKSt5RTgIlK0/yJq7xCDR/lrs=

%URL%
http://www.veripool.org/projects/verilator/wiki/Intro

%LICENSE%
LGPL

%ARCH%
armv7h

%BUILDDATE%
1524209613

%PACKAGER%
Arch Linux ARM Build System <builder+xu3@archlinuxarm.org>

