%FILENAME%
verilator-4.016-1-armv7h.pkg.tar.xz

%NAME%
verilator

%BASE%
verilator

%VERSION%
4.016-1

%DESC%
The fastest free Verilog HDL simulator

%CSIZE%
2494488

%ISIZE%
13766656

%MD5SUM%
1ab9041098d6ba7b252f8f797c578f06

%SHA256SUM%
f1da7bead4bd1cacd143b7fe9d5e249c0ecba73198cf43b3fa1d1d02fb0efd14

%PGPSIG%
iQIzBAABCAAdFiEEaLNTfzmjE7PldNBndxk/FSvb5qYFAl0RFN4ACgkQdxk/FSvb5qaOMw//d/1NYSN0co9xtEan/R0oU4mop/oRv3f4SR+bP2dIRCozBkaCYuJ3SlFkNAvKCV52Us2qthLiB2l+Xl4Tuz2MzapNtP47F7W+r9Z/b0tBFzvKF6dt/CJPtdGcKDvzqHfvpf0pFVn0+KvYEM85MHQnWFbKDcV8q0opVmwxtQycje6uagFpjafVU34+7ixUDE6VKhLc4opqclk5npMesD4Af4vHWfPjmbS1oSa+NB5LoBoA7MbtNe6zVveP9f22LhEVB+u3Mp0CAWBgULFmSel8/qowozWl2+7v6bFgJd8kSmjaIXFTsDaylqxtvCzrfbsN97gdvzCYXlJSaASHuMYLeClU0iChLojVWNs7wEEqvANTLGJyeCfJmcyb8pWDTLzz9tdp+zPT7aOGnEWwQm4f/6GwiuESXX/32GZM9QNfw+ZSGV34TQQ3UufnMTEIidrNLrtynyDZZ6w+9ZMLTBaNy7t7G8UgD/jtpp7WFi6xEmF9BU2P5dOh+uUcmVZIlN5oh7o13S9GwMaR59LcUyDNy+ROeyzl9qe6Pcu71RNEexLgR5GarVg+n0nwePvcR2wGE7SDGG8J7Fd15h6AB3Tuc0rpqXwEx5TNX0yqZIvmfyPR/8yC2fhInDkSJhZ4kJ3EqFdMnB7+LkwJKSHcqgtbnjv3JazNE8Y7iprZ0ziqQ8o=

%URL%
http://www.veripool.org/projects/verilator/wiki/Intro

%LICENSE%
LGPL

%ARCH%
armv7h

%BUILDDATE%
1561400302

%PACKAGER%
Arch Linux ARM Build System <builder+xu6@archlinuxarm.org>

