%FILENAME%
verilator-4.018-1-armv7h.pkg.tar.xz

%NAME%
verilator

%BASE%
verilator

%VERSION%
4.018-1

%DESC%
The fastest free Verilog HDL simulator

%CSIZE%
2356516

%ISIZE%
11035648

%MD5SUM%
e17b23bce035504990e9e1e575730a96

%SHA256SUM%
45c393c50a51df8603a55eb18fbcae3a37fcc1b64cdb5d183287ba0c54e20212

%PGPSIG%
iQIzBAABCAAdFiEEaLNTfzmjE7PldNBndxk/FSvb5qYFAl1rm+4ACgkQdxk/FSvb5qZlXg/7BHVA3tPf/F3mpF0rdcjDNgQpxgZT2ijeQ4MLciP20fMUnGjkWgHMWJd6Ue53dM2jofjz9+QHs/Pm1PAz5TJzUl6itlNhYGEiAQOSVtvumdXOaK/hHDY70kb12r59p7qJQZg5v5pN9C+aEgYw78R2M/JmI8lxqJZMqlvgQbiQB92fUfRSHNaE/x9LiCMsU8wZwlaRhfDC9lTP1kWL48FcOOTn9ClaP7XJ3lmweicvDuGAc452uCHfGOTVq6THI9Hrf7+ylr4ZMjFef8risLYgA4N8YNCnkI2P8YbUYs+YS+HjWQpxVcjASZIKq/qI8Td3IGgUqAYiQCp+nMiYaOt7Hsrikwvpe/kFxQU5EcOGrTx2bOQqmhVhSpw0r87FcjKXAhG8P5k/cI12mEHXeX6UiX2adrl6m213BM2Wl2WzssnXtlXhLE88qEadKNb84NrPC5TRbKKAsdD/YrQAF8Qzw9nU1MlkFo8Pvqx1WC+l/fSZi7l7xjFR/P1U3vB1K/nva0DXxsmo3GVq8WmsNdKx89Tn0R/voquW0RiPTAigCJYELO/Q+JZYWLCrbaY6xqt3mcfpQ/KtLhBRQsattwQXgyYYsRTtYLqNapVkcFOMUAMLt/FS7yeyH8JdJH2FMfO76RGJ2XROxQOBylQxO3adF6NKq7nJrqNU7iHyzfkQrY0=

%URL%
https://www.veripool.org/projects/verilator/wiki/Intro

%LICENSE%
LGPL

%ARCH%
armv7h

%BUILDDATE%
1567333078

%PACKAGER%
Arch Linux ARM Build System <builder+xu3@archlinuxarm.org>

