#!/bin/sh
export PATH='/usr/lib/distcc/bin:/usr/local/sbin:/usr/local/bin:/usr/bin:/usr/bin/site_perl:/usr/bin/vendor_perl:/usr/bin/core_perl:/usr/bin/site_perl:/usr/bin/vendor_perl:/usr/bin/core_perl:/usr/bin/site_perl:/usr/bin/vendor_perl:/usr/bin/core_perl:/usr/bin/site_perl:/usr/bin/vendor_perl:/usr/bin/core_perl'
echo 'name: clash-prelude
version: 0.99.3
id: clash-prelude-0.99.3-CaTtzST2XsbM47fKdGEgL
key: clash-prelude-0.99.3-CaTtzST2XsbM47fKdGEgL
license: BSD-2-Clause
copyright: Copyright © 2013-2016, University of Twente,
           2016-2017, Myrtle Software Ltd,
           2017     , QBayLogic, Google Inc.
maintainer: Christiaan Baaij <christiaan.baaij@gmail.com>
author: Christiaan Baaij
homepage: http://www.clash-lang.org/
synopsis: CAES Language for Synchronous Hardware - Prelude library
description:
    CλaSH (pronounced ‘clash’) is a functional hardware description language that
    borrows both its syntax and semantics from the functional programming language
    Haskell. The CλaSH compiler transforms these high-level descriptions to
    low-level synthesizable VHDL, Verilog, or SystemVerilog.
    .
    Features of CλaSH:
    .
    * Strongly typed, but with a very high degree of type inference, enabling both
    safe and fast prototyping using concise descriptions.
    .
    * Interactive REPL: load your designs in an interpreter and easily test all
    your component without needing to setup a test bench.
    .
    * Higher-order functions, with type inference, result in designs that are
    fully parametric by default.
    .
    * Synchronous sequential circuit design based on streams of values, called
    @Signal@s, lead to natural descriptions of feedback loops.
    .
    * Support for multiple clock domains, with type safe clock domain crossing.
    .
    .
    This package provides:
    .
    * Prelude library containing datatypes and functions for circuit design
    .
    To use the library:
    .
    * Import "Clash.Prelude"
    .
    * Alternatively, if you want to explicitly route clock and reset ports,
    for more straightforward multi-clock designs, you can import the
    "Clash.Explicit.Prelude" module. Note that you should not import
    "Clash.Prelude" and "Clash.Explicit.Prelude" at the same time as they
    have overlapping definitions.
    .
    A preliminary version of a tutorial can be found in "Clash.Tutorial", for a
    general overview of the library you should however check out "Clash.Prelude".
    Some circuit examples can be found in "Clash.Examples".
category: Hardware
abi: 36cd4a35b276462aa664ed88357fea3a
exposed: True
exposed-modules:
    Clash.Annotations.Primitive Clash.Annotations.TopEntity
    Clash.Class.BitPack Clash.Class.Num Clash.Class.Resize
    Clash.Examples Clash.Explicit.BlockRam Clash.Explicit.BlockRam.File
    Clash.Explicit.DDR Clash.Explicit.Mealy Clash.Explicit.Moore
    Clash.Explicit.Prelude Clash.Explicit.Prelude.Safe
    Clash.Explicit.RAM Clash.Explicit.ROM Clash.Explicit.ROM.File
    Clash.Explicit.Signal Clash.Explicit.Signal.Delayed
    Clash.Explicit.Synchronizer Clash.Explicit.Testbench Clash.Hidden
    Clash.Intel.ClockGen Clash.Intel.DDR Clash.NamedTypes Clash.Prelude
    Clash.Prelude.BitIndex Clash.Prelude.BitReduction
    Clash.Prelude.BlockRam Clash.Prelude.BlockRam.File
    Clash.Prelude.DataFlow Clash.Prelude.Mealy Clash.Prelude.Moore
    Clash.Prelude.RAM Clash.Prelude.ROM Clash.Prelude.ROM.File
    Clash.Prelude.Safe Clash.Prelude.Testbench Clash.Promoted.Nat
    Clash.Promoted.Nat.Literals Clash.Promoted.Nat.TH
    Clash.Promoted.Nat.Unsafe Clash.Promoted.Symbol Clash.Signal
    Clash.Signal.Bundle Clash.Signal.Delayed Clash.Signal.Internal
    Clash.Sized.BitVector Clash.Sized.Fixed Clash.Sized.Index
    Clash.Sized.Internal.BitVector Clash.Sized.Internal.Index
    Clash.Sized.Internal.Signed Clash.Sized.Internal.Unsigned
    Clash.Sized.RTree Clash.Sized.Signed Clash.Sized.Unsigned
    Clash.Sized.Vector Clash.Tutorial Clash.XException
    Clash.Xilinx.ClockGen Clash.Xilinx.DDR
hidden-modules: Clash.Class.BitPack.Internal
                Clash.Signal.Bundle.Internal
import-dirs: /usr/lib/ghc-8.6.1/site-local/clash-prelude-0.99.3
library-dirs: /usr/lib/ghc-8.6.1/site-local/clash-prelude-0.99.3
dynamic-library-dirs: /usr/lib
data-dir: /usr/share/arm-linux-ghc-8.6.1/clash-prelude-0.99.3
hs-libraries: HSclash-prelude-0.99.3-CaTtzST2XsbM47fKdGEgL
depends:
    QuickCheck-2.11.3-BDoyaQh2Mcq3pIdI4VETKc array-0.5.2.0
    base-4.12.0.0 bifunctors-5.5.3-JOCZ6gpIic7H4mHnWNJbdd
    constraints-0.10.1-4ZlPLuIpNwlYLXrOS6jjU
    data-binary-ieee754-0.4.4-Jh3qq4jPu7AAxCF7JMXnJo
    data-default-0.7.1.1-9TvgjOMl8fiEDpKR9EhMBO deepseq-1.4.4.0
    ghc-prim-0.5.3 ghc-typelits-extra-0.3-3auTPQpl7g3D09kZafSvUS
    ghc-typelits-knownnat-0.6-EKboioZbN6n8O9S8oOsEVU
    ghc-typelits-natnormalise-0.6.2-CVUPRGg5qk617hvbsPki0x
    half-0.3-Eol8Au0hqij4tLI0U5uzd integer-gmp-1.0.2.0
    lens-4.17-8h7k4T9w40mJobS2zuaMS4
    reflection-2.1.4-D3IaixAKGmk6dzEKDGsgtn
    singletons-2.5-DKEPkS9ly5uHH6PjsiCQ9o template-haskell-2.14.0.0
    transformers-0.5.5.0 vector-0.12.0.1-BKWaeB2IPwRDyZEP11mv5m
haddock-interfaces: /usr/share/doc/haskell-clash-prelude/html/clash-prelude.haddock
haddock-html: /usr/share/doc/haskell-clash-prelude/html
' | '/usr/bin/ghc-pkg' 'update' '--force' '-' '--global' '--no-user-package-db' "$@"

