%FILENAME%
verilator-4.032-1-aarch64.pkg.tar.xz

%NAME%
verilator

%BASE%
verilator

%VERSION%
4.032-1

%DESC%
The fastest free Verilog HDL simulator

%CSIZE%
3599760

%ISIZE%
20469372

%MD5SUM%
592f3c1c0e66c0f5dec0556eb7a95a2f

%SHA256SUM%
1b49bf5bac614474522ae2a3ecf48e9e5e6cee94fafbc97ff80513e992776f3e

%PGPSIG%
iQIzBAABCAAdFiEEaLNTfzmjE7PldNBndxk/FSvb5qYFAl6uOoEACgkQdxk/FSvb5qaktQ/9Fxc24qMj9833GkxTOsKU4fFNp/VchDp9iTc35C4pLdV9n80DBgzThv8HuwSaO7fMOG0e2v3c0ef+sadFsqtdqEzElC5R4eTZuB61GSwwgh4QiBZOLG5eo4y09uxeRZNBL92cRwyfICiVbZXoTy+eofVPkyeT3IWK5mUsBugfkpXAkc2BEcTQJ/SDzyn0CQ5GwfaWhKfgffUc8DqQ+Gnv7J42fwp+EGivrue3pCudEHZrB9USWUxkswLjXt3rcfeGcs8BNPf/AHOdzuwCpC+9lBOdgGyqAL821H2UMHguC6PgJcKTO55DI3UxDamM3ZOkP9PbJeHt+FuGC0bvlKlhoQKin+OqBdJ+U+S/teEzgt30/XkbIAjo9abYlfL9JDxDrkxJ7O0xCtSQabu4fMg9n0LNdm9fVBogVTVG0BRDYGqKX3Feg3J2woVB7zHH+B1O9InSSmzQL/Mn6T7fmnBh6ZFsMfuwQ95XZyKM1pmGxGgnyEOagCMYUg/Gg3iO9A3AwSTgMVe/Qy4gjvLt3Elr4lBkEkEjdlfRCBEPDCTTNgIyku10cm51lymMqKvjfwxwUm2FifiJmQD4LqEdyPhddSFsKzk145XnoFOJzXJr3pcsE92SJt331KaYQFN+U92JlhYFxX5ob3WJl1Le4OWsprJdFVJN3wbQFroRNVq/IK0=

%URL%
https://www.veripool.org/projects/verilator/wiki/Intro

%LICENSE%
LGPL

%ARCH%
aarch64

%BUILDDATE%
1588476397

%PACKAGER%
Arch Linux ARM Build System <builder+seattle@archlinuxarm.org>

