%FILENAME%
verilator-4.212-1-armv7h.pkg.tar.xz

%NAME%
verilator

%BASE%
verilator

%VERSION%
4.212-1

%DESC%
The fastest free Verilog HDL simulator

%CSIZE%
3820648

%ISIZE%
18230398

%MD5SUM%
8bdce6a4a00cf78c430bdd1a3569fe40

%SHA256SUM%
12ca4386cd80a89b92b5cb57dc3a587aab83f3d5e19149fbba028790cb664adf

%PGPSIG%
iQIzBAABCAAdFiEEaLNTfzmjE7PldNBndxk/FSvb5qYFAmE9b5gACgkQdxk/FSvb5qafLA/9F/q1bRrHGRJTFE3kWtL/+mnk8AKAH9MQlW8Hn7/K7tiyeSabm1gOY+2+A2lxDwanROys2Dl2F00HoCUwTAkag+W9B+ChGWuFLeR/qzQQb/aUFdfvI8IoS2toRTcgSgPmcrcAHAlE4l8gabixsGm0IIgj3fGazhDVH9GuRZzk9wzb8bfcG1DDczZnJ6mhAYiB2LTMnE7r16YTAKT9WG6SkPvoemxeiZrZUEt64K2VRDoBfoe1E29uG+i6/1LaVEZIztfG8e0k7/RuxvsgSITbtCV3nz4x2kBSTlWIRIWI9mzKsPOc5J2I8L0h7adMPkPWSI9tW/a+0WCQHWgGlkQhPbSR+ABWdNFCQPtDikAdM7FpblWMfzhHJb1qP9NfvJUclpiCq8dnAF31hUk3IA7qmQn43YngV/7GYhrB86htu+168u9uizLzzC7Ua8szcvk/OOyECMV6U5pXQISp9qhG4V2oXZ0wLqcmnZXNcQ1Q6x0f16MLvrcfc8Qsjv2CttKeSuKnqux5w5EeaHMgBpboAcWV/Oxub1wH6pRDPDKetnYtiCwfMudA5vgxJ7REtDJGbGzrZz+UK+XvGcMb+X5pUjpM0CWVQv0XGMEyWSD7/hVkYbY1FmSkVWzXS/pMfsQk4SRxvMXxRwC0bgB3yvPh1OjBWTqNa9MZ47tEYedl3EI=

%URL%
https://www.veripool.org/projects/verilator/wiki/Intro

%LICENSE%
LGPL

%ARCH%
armv7h

%BUILDDATE%
1631415830

%PACKAGER%
Arch Linux ARM Build System <builder+xu4@archlinuxarm.org>

