VkBufferMemoryBarrier2(3)

# VkBufferMemoryBarrier2(3) Manual Page

## Name

VkBufferMemoryBarrier2 - Structure specifying a buffer memory barrier

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## C Specification

The `VkBufferMemoryBarrier2` structure is defined as:

    // Provided by VK_VERSION_1_3
    typedef struct VkBufferMemoryBarrier2 {
        VkStructureType          sType;
        const void*              pNext;
        VkPipelineStageFlags2    srcStageMask;
        VkAccessFlags2           srcAccessMask;
        VkPipelineStageFlags2    dstStageMask;
        VkAccessFlags2           dstAccessMask;
        uint32_t                 srcQueueFamilyIndex;
        uint32_t                 dstQueueFamilyIndex;
        VkBuffer                 buffer;
        VkDeviceSize             offset;
        VkDeviceSize             size;
    } VkBufferMemoryBarrier2;

or the equivalent

    // Provided by VK_KHR_synchronization2
    typedef VkBufferMemoryBarrier2 VkBufferMemoryBarrier2KHR;

## Members

- `sType` is the type of this structure.

- `pNext` is `NULL` or a pointer to a structure extending this structure.

- `srcStageMask` is a VkPipelineStageFlags2 mask of pipeline stages to be included in the first synchronization scope.

- `srcAccessMask` is a VkAccessFlags2 mask of access flags to be included in the first access scope.

- `dstStageMask` is a VkPipelineStageFlags2 mask of pipeline stages to be included in the second synchronization scope.

- `dstAccessMask` is a VkAccessFlags2 mask of access flags to be included in the second access scope.

- `srcQueueFamilyIndex` is the source queue family for a queue family ownership transfer.

- `dstQueueFamilyIndex` is the destination queue family for a queue family ownership transfer.

- `buffer` is a handle to the buffer whose backing memory is affected by the barrier.

- `offset` is an offset in bytes into the backing memory for `buffer`; this is relative to the base offset as bound to the buffer (see vkBindBufferMemory).

- `size` is a size in bytes of the affected area of backing memory for `buffer`, or `VK_WHOLE_SIZE` to use the range from `offset` to the end of the buffer.

## Description

This structure defines a memory dependency limited to a range of a buffer, and can define a queue family transfer operation for that range.

The first synchronization scope and access scope described by this structure include only operations and memory accesses specified by `srcStageMask` and `srcAccessMask`.

The second synchronization scope and access scope described by this structure include only operations and memory accesses specified by `dstStageMask` and `dstAccessMask`.

Both access scopes are limited to only memory accesses to `buffer` in the range defined by `offset` and `size`.

If `buffer` was created with `VK_SHARING_MODE_EXCLUSIVE`, and `srcQueueFamilyIndex` is not equal to `dstQueueFamilyIndex`, this memory barrier defines a queue family transfer operation. When executed on a queue in the family identified by `srcQueueFamilyIndex`, this barrier defines a queue family release operation for the specified buffer range, and the second synchronization and access scopes do not synchronize operations on that queue. When executed on a queue in the family identified by `dstQueueFamilyIndex`, this barrier defines a queue family acquire operation for the specified buffer range, and the first synchronization and access scopes do not synchronize operations on that queue.

A queue family transfer operation is also defined if the values are not equal, and either is one of the special queue family values reserved for external memory ownership transfers, as described in https://www.khronos.org/registry/vulkan/specs/1.3-extensions/html/vkspec.html#synchronization-queue-transfers. A queue family release operation is defined when `dstQueueFamilyIndex` is one of those values, and a queue family acquire operation is defined when `srcQueueFamilyIndex` is one of those values.

Valid Usage

- VUID-VkBufferMemoryBarrier2-srcStageMask-03929
  If the geometry shaders feature is not enabled, `srcStageMask` must not contain `VK_PIPELINE_STAGE_2_GEOMETRY_SHADER_BIT`

- VUID-VkBufferMemoryBarrier2-srcStageMask-03930
  If the tessellation shaders feature is not enabled, `srcStageMask` must not contain `VK_PIPELINE_STAGE_2_TESSELLATION_CONTROL_SHADER_BIT` or `VK_PIPELINE_STAGE_2_TESSELLATION_EVALUATION_SHADER_BIT`

- VUID-VkBufferMemoryBarrier2-srcStageMask-03931
  If the conditional rendering feature is not enabled, `srcStageMask` must not contain `VK_PIPELINE_STAGE_2_CONDITIONAL_RENDERING_BIT_EXT`

- VUID-VkBufferMemoryBarrier2-srcStageMask-03932
  If the fragment density map feature is not enabled, `srcStageMask` must not contain `VK_PIPELINE_STAGE_2_FRAGMENT_DENSITY_PROCESS_BIT_EXT`

- VUID-VkBufferMemoryBarrier2-srcStageMask-03933
  If the transform feedback feature is not enabled, `srcStageMask` must not contain `VK_PIPELINE_STAGE_2_TRANSFORM_FEEDBACK_BIT_EXT`

- VUID-VkBufferMemoryBarrier2-srcStageMask-03934
  If the mesh shaders feature is not enabled, `srcStageMask` must not contain `VK_PIPELINE_STAGE_2_MESH_SHADER_BIT_NV`

- VUID-VkBufferMemoryBarrier2-srcStageMask-03935
  If the task shaders feature is not enabled, `srcStageMask` must not contain `VK_PIPELINE_STAGE_2_TASK_SHADER_BIT_NV`

- VUID-VkBufferMemoryBarrier2-srcStageMask-04956
  If the shading rate image feature is not enabled, `srcStageMask` must not contain `VK_PIPELINE_STAGE_2_SHADING_RATE_IMAGE_BIT_NV`

- VUID-VkBufferMemoryBarrier2-srcStageMask-04957
  If the subpass shading feature is not enabled, `srcStageMask` must not contain `VK_PIPELINE_STAGE_2_SUBPASS_SHADING_BIT_HUAWEI`

- VUID-VkBufferMemoryBarrier2-srcStageMask-04995
  If the invocation mask image feature is not enabled, `srcStageMask` must not contain `VK_PIPELINE_STAGE_2_INVOCATION_MASK_BIT_HUAWEI`

- VUID-VkBufferMemoryBarrier2-srcAccessMask-03900
  If `srcAccessMask` includes `VK_ACCESS_2_INDIRECT_COMMAND_READ_BIT`, `srcStageMask` must include `VK_PIPELINE_STAGE_2_DRAW_INDIRECT_BIT`, `VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR`, `VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT`, or `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`

- VUID-VkBufferMemoryBarrier2-srcAccessMask-03901
  If `srcAccessMask` includes `VK_ACCESS_2_INDEX_READ_BIT`, `srcStageMask` must include `VK_PIPELINE_STAGE_2_INDEX_INPUT_BIT`, `VK_PIPELINE_STAGE_2_VERTEX_INPUT_BIT`, `VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT`, or `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`

- VUID-VkBufferMemoryBarrier2-srcAccessMask-03902
  If `srcAccessMask` includes `VK_ACCESS_2_VERTEX_ATTRIBUTE_READ_BIT`, `srcStageMask` must include `VK_PIPELINE_STAGE_2_VERTEX_ATTRIBUTE_INPUT_BIT`, `VK_PIPELINE_STAGE_2_VERTEX_INPUT_BIT`, `VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT`, or `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`

- VUID-VkBufferMemoryBarrier2-srcAccessMask-03903
  If `srcAccessMask` includes `VK_ACCESS_2_INPUT_ATTACHMENT_READ_BIT`, `srcStageMask` must include `VK_PIPELINE_STAGE_2_FRAGMENT_SHADER_BIT`, `VK_PIPELINE_STAGE_2_SUBPASS_SHADING_BIT_HUAWEI`, `VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT`, or `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`

- VUID-VkBufferMemoryBarrier2-srcAccessMask-03904
  If `srcAccessMask` includes `VK_ACCESS_2_UNIFORM_READ_BIT`, `srcStageMask` must include `VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT`, `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`, or one of the `VK_PIPELINE_STAGE_*_SHADER_BIT` stages

- VUID-VkBufferMemoryBarrier2-srcAccessMask-03905
  If `srcAccessMask` includes `VK_ACCESS_2_SHADER_SAMPLED_READ_BIT`, `srcStageMask` must include `VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT`, `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`, or one of the `VK_PIPELINE_STAGE_*_SHADER_BIT` stages

- VUID-VkBufferMemoryBarrier2-srcAccessMask-03906
  If `srcAccessMask` includes `VK_ACCESS_2_SHADER_STORAGE_READ_BIT`, `srcStageMask` must include `VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT`, `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`, or one of the `VK_PIPELINE_STAGE_*_SHADER_BIT` stages

- VUID-VkBufferMemoryBarrier2-srcAccessMask-03907
  If `srcAccessMask` includes `VK_ACCESS_2_SHADER_STORAGE_WRITE_BIT`, `srcStageMask` must include `VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT`, `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`, or one of the `VK_PIPELINE_STAGE_*_SHADER_BIT` stages

- VUID-VkBufferMemoryBarrier2-srcAccessMask-03908
  If `srcAccessMask` includes `VK_ACCESS_2_SHADER_READ_BIT`, `srcStageMask` must include `VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT`, `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`, `VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR`, or one of the `VK_PIPELINE_STAGE_*_SHADER_BIT` stages

- VUID-VkBufferMemoryBarrier2-srcAccessMask-03909
  If `srcAccessMask` includes `VK_ACCESS_2_SHADER_WRITE_BIT`, `srcStageMask` must include `VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT`, `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`, or one of the `VK_PIPELINE_STAGE_*_SHADER_BIT` stages

- VUID-VkBufferMemoryBarrier2-srcAccessMask-03910
  If `srcAccessMask` includes `VK_ACCESS_2_COLOR_ATTACHMENT_READ_BIT`, `srcStageMask` must include `VK_PIPELINE_STAGE_2_COLOR_ATTACHMENT_OUTPUT_BIT` `VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT`, or `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`

- VUID-VkBufferMemoryBarrier2-srcAccessMask-03911
  If `srcAccessMask` includes `VK_ACCESS_2_COLOR_ATTACHMENT_WRITE_BIT`, `srcStageMask` must include `VK_PIPELINE_STAGE_2_COLOR_ATTACHMENT_OUTPUT_BIT` `VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT`, or `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`

- VUID-VkBufferMemoryBarrier2-srcAccessMask-03912
  If `srcAccessMask` includes `VK_ACCESS_2_DEPTH_STENCIL_ATTACHMENT_READ_BIT`, `srcStageMask` must include `VK_PIPELINE_STAGE_2_EARLY_FRAGMENT_TESTS_BIT`, `VK_PIPELINE_STAGE_2_LATE_FRAGMENT_TESTS_BIT`, `VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT`, or `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`

- VUID-VkBufferMemoryBarrier2-srcAccessMask-03913
  If `srcAccessMask` includes `VK_ACCESS_2_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT`, `srcStageMask` must include `VK_PIPELINE_STAGE_2_EARLY_FRAGMENT_TESTS_BIT`, `VK_PIPELINE_STAGE_2_LATE_FRAGMENT_TESTS_BIT`, `VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT`, or `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`

- VUID-VkBufferMemoryBarrier2-srcAccessMask-03914
  If `srcAccessMask` includes `VK_ACCESS_2_TRANSFER_READ_BIT`, `srcStageMask` must include `VK_PIPELINE_STAGE_2_COPY_BIT`, `VK_PIPELINE_STAGE_2_BLIT_BIT`, `VK_PIPELINE_STAGE_2_RESOLVE_BIT`, `VK_PIPELINE_STAGE_2_ALL_TRANSFER_BIT`, `VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR`, or `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`

- VUID-VkBufferMemoryBarrier2-srcAccessMask-03915
  If `srcAccessMask` includes `VK_ACCESS_2_TRANSFER_WRITE_BIT`, `srcStageMask` must include `VK_PIPELINE_STAGE_2_COPY_BIT`, `VK_PIPELINE_STAGE_2_BLIT_BIT`, `VK_PIPELINE_STAGE_2_RESOLVE_BIT`, `VK_PIPELINE_STAGE_2_CLEAR_BIT`, `VK_PIPELINE_STAGE_2_ALL_TRANSFER_BIT`, `VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR`, or `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`

- VUID-VkBufferMemoryBarrier2-srcAccessMask-03916
  If `srcAccessMask` includes `VK_ACCESS_2_HOST_READ_BIT`, `srcStageMask` must include `VK_PIPELINE_STAGE_2_HOST_BIT`

- VUID-VkBufferMemoryBarrier2-srcAccessMask-03917
  If `srcAccessMask` includes `VK_ACCESS_2_HOST_WRITE_BIT`, `srcStageMask` must include `VK_PIPELINE_STAGE_2_HOST_BIT`

- VUID-VkBufferMemoryBarrier2-srcAccessMask-03918
  If `srcAccessMask` includes `VK_ACCESS_2_CONDITIONAL_RENDERING_READ_BIT_EXT`, `srcStageMask` must include `VK_PIPELINE_STAGE_2_CONDITIONAL_RENDERING_BIT_EXT`, `VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT`, or `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`

- VUID-VkBufferMemoryBarrier2-srcAccessMask-03919
  If `srcAccessMask` includes `VK_ACCESS_2_FRAGMENT_DENSITY_MAP_READ_BIT_EXT`, `srcStageMask` must include `VK_PIPELINE_STAGE_2_FRAGMENT_DENSITY_PROCESS_BIT_EXT`, `VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT`, or `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`

- VUID-VkBufferMemoryBarrier2-srcAccessMask-03920
  If `srcAccessMask` includes `VK_ACCESS_2_TRANSFORM_FEEDBACK_WRITE_BIT_EXT`, `srcStageMask` must include `VK_PIPELINE_STAGE_2_TRANSFORM_FEEDBACK_BIT_EXT`, `VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT`, or `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`

- VUID-VkBufferMemoryBarrier2-srcAccessMask-04747
  If `srcAccessMask` includes `VK_ACCESS_2_TRANSFORM_FEEDBACK_COUNTER_READ_BIT_EXT`, `srcStageMask` must include `VK_PIPELINE_STAGE_2_DRAW_INDIRECT_BIT`, `VK_PIPELINE_STAGE_2_TRANSFORM_FEEDBACK_BIT_EXT`, `VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT`, or `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`

- VUID-VkBufferMemoryBarrier2-srcAccessMask-03922
  If `srcAccessMask` includes `VK_ACCESS_2_TRANSFORM_FEEDBACK_COUNTER_WRITE_BIT_EXT`, `srcStageMask` must include `VK_PIPELINE_STAGE_2_TRANSFORM_FEEDBACK_BIT_EXT`, `VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT`, or `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`

- VUID-VkBufferMemoryBarrier2-srcAccessMask-03923
  If `srcAccessMask` includes `VK_ACCESS_2_SHADING_RATE_IMAGE_READ_BIT_NV`, `srcStageMask` must include `VK_PIPELINE_STAGE_2_SHADING_RATE_IMAGE_BIT_NV`, `VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT`, or `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`

- VUID-VkBufferMemoryBarrier2-srcAccessMask-04994
  If `srcAccessMask` includes `VK_ACCESS_2_INVOCATION_MASK_READ_BIT_HUAWEI`, `srcStageMask` must include `VK_PIPELINE_STAGE_2_INVOCATION_MASK_BIT_HUAWEI`

- VUID-VkBufferMemoryBarrier2-srcAccessMask-03924
  If `srcAccessMask` includes `VK_ACCESS_2_COMMAND_PREPROCESS_READ_BIT_NV`, `srcStageMask` must include `VK_PIPELINE_STAGE_2_COMMAND_PREPROCESS_BIT_NV` or `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`

- VUID-VkBufferMemoryBarrier2-srcAccessMask-03925
  If `srcAccessMask` includes `VK_ACCESS_2_COMMAND_PREPROCESS_WRITE_BIT_NV`, `srcStageMask` must include `VK_PIPELINE_STAGE_2_COMMAND_PREPROCESS_BIT_NV` or `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`

- VUID-VkBufferMemoryBarrier2-srcAccessMask-03926
  If `srcAccessMask` includes `VK_ACCESS_2_COLOR_ATTACHMENT_READ_NONCOHERENT_BIT_EXT`, `srcStageMask` must include `VK_PIPELINE_STAGE_2_COLOR_ATTACHMENT_OUTPUT_BIT` `VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT`, or `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`

- VUID-VkBufferMemoryBarrier2-srcAccessMask-03927
  If `srcAccessMask` includes `VK_ACCESS_2_ACCELERATION_STRUCTURE_READ_BIT_KHR`, `srcStageMask` must include `VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR`, `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`, or one of the `VK_PIPELINE_STAGE_*_SHADER_BIT` stages

- VUID-VkBufferMemoryBarrier2-srcAccessMask-03928
  If `srcAccessMask` includes `VK_ACCESS_2_ACCELERATION_STRUCTURE_WRITE_BIT_KHR`, `srcStageMask` must include `VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR` or `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`

- VUID-VkBufferMemoryBarrier2-srcAccessMask-06256
  If `rayQuery` is not enabled and `srcAccessMask` includes `VK_ACCESS_2_ACCELERATION_STRUCTURE_READ_BIT_KHR`, `srcStageMask` must not include any of the `VK_PIPELINE_STAGE_*_SHADER_BIT` stages except `VK_PIPELINE_STAGE_2_RAY_TRACING_SHADER_BIT_KHR`

- VUID-VkBufferMemoryBarrier2-srcAccessMask-04858
  If `srcAccessMask` includes `VK_ACCESS_2_VIDEO_DECODE_READ_BIT_KHR`, `srcStageMask` must include `VK_PIPELINE_STAGE_2_VIDEO_DECODE_BIT_KHR`

- VUID-VkBufferMemoryBarrier2-srcAccessMask-04859
  If `srcAccessMask` includes `VK_ACCESS_2_VIDEO_DECODE_WRITE_BIT_KHR`, `srcStageMask` must include `VK_PIPELINE_STAGE_2_VIDEO_DECODE_BIT_KHR`

- VUID-VkBufferMemoryBarrier2-srcAccessMask-04860
  If `srcAccessMask` includes `VK_ACCESS_2_VIDEO_ENCODE_READ_BIT_KHR`, `srcStageMask` must include `VK_PIPELINE_STAGE_2_VIDEO_ENCODE_BIT_KHR`

- VUID-VkBufferMemoryBarrier2-srcAccessMask-04861
  If `srcAccessMask` includes `VK_ACCESS_2_VIDEO_ENCODE_WRITE_BIT_KHR`, `srcStageMask` must include `VK_PIPELINE_STAGE_2_VIDEO_ENCODE_BIT_KHR`

- VUID-VkBufferMemoryBarrier2-dstStageMask-03929
  If the geometry shaders feature is not enabled, `dstStageMask` must not contain `VK_PIPELINE_STAGE_2_GEOMETRY_SHADER_BIT`

- VUID-VkBufferMemoryBarrier2-dstStageMask-03930
  If the tessellation shaders feature is not enabled, `dstStageMask` must not contain `VK_PIPELINE_STAGE_2_TESSELLATION_CONTROL_SHADER_BIT` or `VK_PIPELINE_STAGE_2_TESSELLATION_EVALUATION_SHADER_BIT`

- VUID-VkBufferMemoryBarrier2-dstStageMask-03931
  If the conditional rendering feature is not enabled, `dstStageMask` must not contain `VK_PIPELINE_STAGE_2_CONDITIONAL_RENDERING_BIT_EXT`

- VUID-VkBufferMemoryBarrier2-dstStageMask-03932
  If the fragment density map feature is not enabled, `dstStageMask` must not contain `VK_PIPELINE_STAGE_2_FRAGMENT_DENSITY_PROCESS_BIT_EXT`

- VUID-VkBufferMemoryBarrier2-dstStageMask-03933
  If the transform feedback feature is not enabled, `dstStageMask` must not contain `VK_PIPELINE_STAGE_2_TRANSFORM_FEEDBACK_BIT_EXT`

- VUID-VkBufferMemoryBarrier2-dstStageMask-03934
  If the mesh shaders feature is not enabled, `dstStageMask` must not contain `VK_PIPELINE_STAGE_2_MESH_SHADER_BIT_NV`

- VUID-VkBufferMemoryBarrier2-dstStageMask-03935
  If the task shaders feature is not enabled, `dstStageMask` must not contain `VK_PIPELINE_STAGE_2_TASK_SHADER_BIT_NV`

- VUID-VkBufferMemoryBarrier2-dstStageMask-04956
  If the shading rate image feature is not enabled, `dstStageMask` must not contain `VK_PIPELINE_STAGE_2_SHADING_RATE_IMAGE_BIT_NV`

- VUID-VkBufferMemoryBarrier2-dstStageMask-04957
  If the subpass shading feature is not enabled, `dstStageMask` must not contain `VK_PIPELINE_STAGE_2_SUBPASS_SHADING_BIT_HUAWEI`

- VUID-VkBufferMemoryBarrier2-dstStageMask-04995
  If the invocation mask image feature is not enabled, `dstStageMask` must not contain `VK_PIPELINE_STAGE_2_INVOCATION_MASK_BIT_HUAWEI`

- VUID-VkBufferMemoryBarrier2-dstAccessMask-03900
  If `dstAccessMask` includes `VK_ACCESS_2_INDIRECT_COMMAND_READ_BIT`, `dstStageMask` must include `VK_PIPELINE_STAGE_2_DRAW_INDIRECT_BIT`, `VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR`, `VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT`, or `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`

- VUID-VkBufferMemoryBarrier2-dstAccessMask-03901
  If `dstAccessMask` includes `VK_ACCESS_2_INDEX_READ_BIT`, `dstStageMask` must include `VK_PIPELINE_STAGE_2_INDEX_INPUT_BIT`, `VK_PIPELINE_STAGE_2_VERTEX_INPUT_BIT`, `VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT`, or `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`

- VUID-VkBufferMemoryBarrier2-dstAccessMask-03902
  If `dstAccessMask` includes `VK_ACCESS_2_VERTEX_ATTRIBUTE_READ_BIT`, `dstStageMask` must include `VK_PIPELINE_STAGE_2_VERTEX_ATTRIBUTE_INPUT_BIT`, `VK_PIPELINE_STAGE_2_VERTEX_INPUT_BIT`, `VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT`, or `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`

- VUID-VkBufferMemoryBarrier2-dstAccessMask-03903
  If `dstAccessMask` includes `VK_ACCESS_2_INPUT_ATTACHMENT_READ_BIT`, `dstStageMask` must include `VK_PIPELINE_STAGE_2_FRAGMENT_SHADER_BIT`, `VK_PIPELINE_STAGE_2_SUBPASS_SHADING_BIT_HUAWEI`, `VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT`, or `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`

- VUID-VkBufferMemoryBarrier2-dstAccessMask-03904
  If `dstAccessMask` includes `VK_ACCESS_2_UNIFORM_READ_BIT`, `dstStageMask` must include `VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT`, `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`, or one of the `VK_PIPELINE_STAGE_*_SHADER_BIT` stages

- VUID-VkBufferMemoryBarrier2-dstAccessMask-03905
  If `dstAccessMask` includes `VK_ACCESS_2_SHADER_SAMPLED_READ_BIT`, `dstStageMask` must include `VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT`, `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`, or one of the `VK_PIPELINE_STAGE_*_SHADER_BIT` stages

- VUID-VkBufferMemoryBarrier2-dstAccessMask-03906
  If `dstAccessMask` includes `VK_ACCESS_2_SHADER_STORAGE_READ_BIT`, `dstStageMask` must include `VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT`, `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`, or one of the `VK_PIPELINE_STAGE_*_SHADER_BIT` stages

- VUID-VkBufferMemoryBarrier2-dstAccessMask-03907
  If `dstAccessMask` includes `VK_ACCESS_2_SHADER_STORAGE_WRITE_BIT`, `dstStageMask` must include `VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT`, `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`, or one of the `VK_PIPELINE_STAGE_*_SHADER_BIT` stages

- VUID-VkBufferMemoryBarrier2-dstAccessMask-03908
  If `dstAccessMask` includes `VK_ACCESS_2_SHADER_READ_BIT`, `dstStageMask` must include `VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT`, `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`, `VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR`, or one of the `VK_PIPELINE_STAGE_*_SHADER_BIT` stages

- VUID-VkBufferMemoryBarrier2-dstAccessMask-03909
  If `dstAccessMask` includes `VK_ACCESS_2_SHADER_WRITE_BIT`, `dstStageMask` must include `VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT`, `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`, or one of the `VK_PIPELINE_STAGE_*_SHADER_BIT` stages

- VUID-VkBufferMemoryBarrier2-dstAccessMask-03910
  If `dstAccessMask` includes `VK_ACCESS_2_COLOR_ATTACHMENT_READ_BIT`, `dstStageMask` must include `VK_PIPELINE_STAGE_2_COLOR_ATTACHMENT_OUTPUT_BIT` `VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT`, or `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`

- VUID-VkBufferMemoryBarrier2-dstAccessMask-03911
  If `dstAccessMask` includes `VK_ACCESS_2_COLOR_ATTACHMENT_WRITE_BIT`, `dstStageMask` must include `VK_PIPELINE_STAGE_2_COLOR_ATTACHMENT_OUTPUT_BIT` `VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT`, or `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`

- VUID-VkBufferMemoryBarrier2-dstAccessMask-03912
  If `dstAccessMask` includes `VK_ACCESS_2_DEPTH_STENCIL_ATTACHMENT_READ_BIT`, `dstStageMask` must include `VK_PIPELINE_STAGE_2_EARLY_FRAGMENT_TESTS_BIT`, `VK_PIPELINE_STAGE_2_LATE_FRAGMENT_TESTS_BIT`, `VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT`, or `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`

- VUID-VkBufferMemoryBarrier2-dstAccessMask-03913
  If `dstAccessMask` includes `VK_ACCESS_2_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT`, `dstStageMask` must include `VK_PIPELINE_STAGE_2_EARLY_FRAGMENT_TESTS_BIT`, `VK_PIPELINE_STAGE_2_LATE_FRAGMENT_TESTS_BIT`, `VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT`, or `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`

- VUID-VkBufferMemoryBarrier2-dstAccessMask-03914
  If `dstAccessMask` includes `VK_ACCESS_2_TRANSFER_READ_BIT`, `dstStageMask` must include `VK_PIPELINE_STAGE_2_COPY_BIT`, `VK_PIPELINE_STAGE_2_BLIT_BIT`, `VK_PIPELINE_STAGE_2_RESOLVE_BIT`, `VK_PIPELINE_STAGE_2_ALL_TRANSFER_BIT`, `VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR`, or `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`

- VUID-VkBufferMemoryBarrier2-dstAccessMask-03915
  If `dstAccessMask` includes `VK_ACCESS_2_TRANSFER_WRITE_BIT`, `dstStageMask` must include `VK_PIPELINE_STAGE_2_COPY_BIT`, `VK_PIPELINE_STAGE_2_BLIT_BIT`, `VK_PIPELINE_STAGE_2_RESOLVE_BIT`, `VK_PIPELINE_STAGE_2_CLEAR_BIT`, `VK_PIPELINE_STAGE_2_ALL_TRANSFER_BIT`, `VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR`, or `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`

- VUID-VkBufferMemoryBarrier2-dstAccessMask-03916
  If `dstAccessMask` includes `VK_ACCESS_2_HOST_READ_BIT`, `dstStageMask` must include `VK_PIPELINE_STAGE_2_HOST_BIT`

- VUID-VkBufferMemoryBarrier2-dstAccessMask-03917
  If `dstAccessMask` includes `VK_ACCESS_2_HOST_WRITE_BIT`, `dstStageMask` must include `VK_PIPELINE_STAGE_2_HOST_BIT`

- VUID-VkBufferMemoryBarrier2-dstAccessMask-03918
  If `dstAccessMask` includes `VK_ACCESS_2_CONDITIONAL_RENDERING_READ_BIT_EXT`, `dstStageMask` must include `VK_PIPELINE_STAGE_2_CONDITIONAL_RENDERING_BIT_EXT`, `VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT`, or `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`

- VUID-VkBufferMemoryBarrier2-dstAccessMask-03919
  If `dstAccessMask` includes `VK_ACCESS_2_FRAGMENT_DENSITY_MAP_READ_BIT_EXT`, `dstStageMask` must include `VK_PIPELINE_STAGE_2_FRAGMENT_DENSITY_PROCESS_BIT_EXT`, `VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT`, or `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`

- VUID-VkBufferMemoryBarrier2-dstAccessMask-03920
  If `dstAccessMask` includes `VK_ACCESS_2_TRANSFORM_FEEDBACK_WRITE_BIT_EXT`, `dstStageMask` must include `VK_PIPELINE_STAGE_2_TRANSFORM_FEEDBACK_BIT_EXT`, `VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT`, or `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`

- VUID-VkBufferMemoryBarrier2-dstAccessMask-04747
  If `dstAccessMask` includes `VK_ACCESS_2_TRANSFORM_FEEDBACK_COUNTER_READ_BIT_EXT`, `dstStageMask` must include `VK_PIPELINE_STAGE_2_DRAW_INDIRECT_BIT`, `VK_PIPELINE_STAGE_2_TRANSFORM_FEEDBACK_BIT_EXT`, `VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT`, or `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`

- VUID-VkBufferMemoryBarrier2-dstAccessMask-03922
  If `dstAccessMask` includes `VK_ACCESS_2_TRANSFORM_FEEDBACK_COUNTER_WRITE_BIT_EXT`, `dstStageMask` must include `VK_PIPELINE_STAGE_2_TRANSFORM_FEEDBACK_BIT_EXT`, `VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT`, or `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`

- VUID-VkBufferMemoryBarrier2-dstAccessMask-03923
  If `dstAccessMask` includes `VK_ACCESS_2_SHADING_RATE_IMAGE_READ_BIT_NV`, `dstStageMask` must include `VK_PIPELINE_STAGE_2_SHADING_RATE_IMAGE_BIT_NV`, `VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT`, or `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`

- VUID-VkBufferMemoryBarrier2-dstAccessMask-04994
  If `dstAccessMask` includes `VK_ACCESS_2_INVOCATION_MASK_READ_BIT_HUAWEI`, `dstStageMask` must include `VK_PIPELINE_STAGE_2_INVOCATION_MASK_BIT_HUAWEI`

- VUID-VkBufferMemoryBarrier2-dstAccessMask-03924
  If `dstAccessMask` includes `VK_ACCESS_2_COMMAND_PREPROCESS_READ_BIT_NV`, `dstStageMask` must include `VK_PIPELINE_STAGE_2_COMMAND_PREPROCESS_BIT_NV` or `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`

- VUID-VkBufferMemoryBarrier2-dstAccessMask-03925
  If `dstAccessMask` includes `VK_ACCESS_2_COMMAND_PREPROCESS_WRITE_BIT_NV`, `dstStageMask` must include `VK_PIPELINE_STAGE_2_COMMAND_PREPROCESS_BIT_NV` or `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`

- VUID-VkBufferMemoryBarrier2-dstAccessMask-03926
  If `dstAccessMask` includes `VK_ACCESS_2_COLOR_ATTACHMENT_READ_NONCOHERENT_BIT_EXT`, `dstStageMask` must include `VK_PIPELINE_STAGE_2_COLOR_ATTACHMENT_OUTPUT_BIT` `VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT`, or `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`

- VUID-VkBufferMemoryBarrier2-dstAccessMask-03927
  If `dstAccessMask` includes `VK_ACCESS_2_ACCELERATION_STRUCTURE_READ_BIT_KHR`, `dstStageMask` must include `VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR`, `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`, or one of the `VK_PIPELINE_STAGE_*_SHADER_BIT` stages

- VUID-VkBufferMemoryBarrier2-dstAccessMask-03928
  If `dstAccessMask` includes `VK_ACCESS_2_ACCELERATION_STRUCTURE_WRITE_BIT_KHR`, `dstStageMask` must include `VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR` or `VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT`

- VUID-VkBufferMemoryBarrier2-dstAccessMask-06256
  If `rayQuery` is not enabled and `dstAccessMask` includes `VK_ACCESS_2_ACCELERATION_STRUCTURE_READ_BIT_KHR`, `dstStageMask` must not include any of the `VK_PIPELINE_STAGE_*_SHADER_BIT` stages except `VK_PIPELINE_STAGE_2_RAY_TRACING_SHADER_BIT_KHR`

- VUID-VkBufferMemoryBarrier2-dstAccessMask-04858
  If `dstAccessMask` includes `VK_ACCESS_2_VIDEO_DECODE_READ_BIT_KHR`, `dstStageMask` must include `VK_PIPELINE_STAGE_2_VIDEO_DECODE_BIT_KHR`

- VUID-VkBufferMemoryBarrier2-dstAccessMask-04859
  If `dstAccessMask` includes `VK_ACCESS_2_VIDEO_DECODE_WRITE_BIT_KHR`, `dstStageMask` must include `VK_PIPELINE_STAGE_2_VIDEO_DECODE_BIT_KHR`

- VUID-VkBufferMemoryBarrier2-dstAccessMask-04860
  If `dstAccessMask` includes `VK_ACCESS_2_VIDEO_ENCODE_READ_BIT_KHR`, `dstStageMask` must include `VK_PIPELINE_STAGE_2_VIDEO_ENCODE_BIT_KHR`

- VUID-VkBufferMemoryBarrier2-dstAccessMask-04861
  If `dstAccessMask` includes `VK_ACCESS_2_VIDEO_ENCODE_WRITE_BIT_KHR`, `dstStageMask` must include `VK_PIPELINE_STAGE_2_VIDEO_ENCODE_BIT_KHR`

- VUID-VkBufferMemoryBarrier2-offset-01187
  `offset` must be less than the size of `buffer`

- VUID-VkBufferMemoryBarrier2-size-01188
  If `size` is not equal to `VK_WHOLE_SIZE`, `size` must be greater than `0`

- VUID-VkBufferMemoryBarrier2-size-01189
  If `size` is not equal to `VK_WHOLE_SIZE`, `size` must be less than or equal to than the size of `buffer` minus `offset`

- VUID-VkBufferMemoryBarrier2-buffer-01931
  If `buffer` is non-sparse then it must be bound completely and contiguously to a single `VkDeviceMemory` object

- VUID-VkBufferMemoryBarrier2-srcQueueFamilyIndex-04087
  If `srcQueueFamilyIndex` is not equal to `dstQueueFamilyIndex`, at least one must not be a special queue family reserved for external memory ownership transfers, as described in [synchronization-queue-transfers]

- VUID-VkBufferMemoryBarrier2-buffer-04088
  If `buffer` was created with a sharing mode of `VK_SHARING_MODE_CONCURRENT`, `srcQueueFamilyIndex` and `dstQueueFamilyIndex` are not equal, and one of `srcQueueFamilyIndex` and `dstQueueFamilyIndex` is one of the special queue family values reserved for external memory transfers, the other must be `VK_QUEUE_FAMILY_IGNORED`

- VUID-VkBufferMemoryBarrier2-buffer-04089
  If `buffer` was created with a sharing mode of `VK_SHARING_MODE_EXCLUSIVE`, and `srcQueueFamilyIndex` and `dstQueueFamilyIndex` are not equal, `srcQueueFamilyIndex` and `dstQueueFamilyIndex` must both be valid queue families, or one of the special queue family values reserved for external memory transfers, as described in [synchronization-queue-transfers]

- VUID-VkBufferMemoryBarrier2-srcStageMask-03851
  If either `srcStageMask` or `dstStageMask` includes `VK_PIPELINE_STAGE_2_HOST_BIT`, `srcQueueFamilyIndex` and `dstQueueFamilyIndex` must be equal

Valid Usage (Implicit)

- VUID-VkBufferMemoryBarrier2-sType-sType
  `sType` must be `VK_STRUCTURE_TYPE_BUFFER_MEMORY_BARRIER_2`

- VUID-VkBufferMemoryBarrier2-pNext-pNext
  `pNext` must be `NULL`

- VUID-VkBufferMemoryBarrier2-srcStageMask-parameter
  `srcStageMask` must be a valid combination of VkPipelineStageFlagBits2 values

- VUID-VkBufferMemoryBarrier2-srcAccessMask-parameter
  `srcAccessMask` must be a valid combination of VkAccessFlagBits2 values

- VUID-VkBufferMemoryBarrier2-dstStageMask-parameter
  `dstStageMask` must be a valid combination of VkPipelineStageFlagBits2 values

- VUID-VkBufferMemoryBarrier2-dstAccessMask-parameter
  `dstAccessMask` must be a valid combination of VkAccessFlagBits2 values

- VUID-VkBufferMemoryBarrier2-buffer-parameter
  `buffer` must be a valid VkBuffer handle

## See Also

VK_KHR_synchronization2, VK_VERSION_1_3, VkAccessFlags2, VkBuffer, VkDependencyInfo, `VkDeviceSize`, VkPipelineStageFlags2, VkStructureType

## Document Notes

For more information, see the Vulkan Specification

This page is extracted from the Vulkan Specification. Fixes and changes should be made to the Specification, not directly.

## Copyright

Copyright 2014-2022 The Khronos Group Inc.

SPDX-License-Identifier: CC-BY-4.0