/* This file is autogenerated by tracetool, do not edit. */

#include "qemu/osdep.h"
#include "qemu/module.h"
#include "trace-target_nios2.h"

uint16_t _TRACE_NIOS2_MMU_TRANSLATE_MISS_DSTATE;
uint16_t _TRACE_NIOS2_MMU_TRANSLATE_HIT_DSTATE;
uint16_t _TRACE_NIOS2_MMU_FLUSH_PID_MISS_DSTATE;
uint16_t _TRACE_NIOS2_MMU_FLUSH_PID_HIT_DSTATE;
uint16_t _TRACE_NIOS2_MMU_WRITE_TLBACC_DSTATE;
uint16_t _TRACE_NIOS2_MMU_WRITE_TLBMISC_DSTATE;
uint16_t _TRACE_NIOS2_MMU_WRITE_PTEADDR_DSTATE;
TraceEvent _TRACE_NIOS2_MMU_TRANSLATE_MISS_EVENT = {
    .id = 0,
    .vcpu_id = TRACE_VCPU_EVENT_NONE,
    .name = "nios2_mmu_translate_miss",
    .sstate = TRACE_NIOS2_MMU_TRANSLATE_MISS_ENABLED,
    .dstate = &_TRACE_NIOS2_MMU_TRANSLATE_MISS_DSTATE 
};
TraceEvent _TRACE_NIOS2_MMU_TRANSLATE_HIT_EVENT = {
    .id = 0,
    .vcpu_id = TRACE_VCPU_EVENT_NONE,
    .name = "nios2_mmu_translate_hit",
    .sstate = TRACE_NIOS2_MMU_TRANSLATE_HIT_ENABLED,
    .dstate = &_TRACE_NIOS2_MMU_TRANSLATE_HIT_DSTATE 
};
TraceEvent _TRACE_NIOS2_MMU_FLUSH_PID_MISS_EVENT = {
    .id = 0,
    .vcpu_id = TRACE_VCPU_EVENT_NONE,
    .name = "nios2_mmu_flush_pid_miss",
    .sstate = TRACE_NIOS2_MMU_FLUSH_PID_MISS_ENABLED,
    .dstate = &_TRACE_NIOS2_MMU_FLUSH_PID_MISS_DSTATE 
};
TraceEvent _TRACE_NIOS2_MMU_FLUSH_PID_HIT_EVENT = {
    .id = 0,
    .vcpu_id = TRACE_VCPU_EVENT_NONE,
    .name = "nios2_mmu_flush_pid_hit",
    .sstate = TRACE_NIOS2_MMU_FLUSH_PID_HIT_ENABLED,
    .dstate = &_TRACE_NIOS2_MMU_FLUSH_PID_HIT_DSTATE 
};
TraceEvent _TRACE_NIOS2_MMU_WRITE_TLBACC_EVENT = {
    .id = 0,
    .vcpu_id = TRACE_VCPU_EVENT_NONE,
    .name = "nios2_mmu_write_tlbacc",
    .sstate = TRACE_NIOS2_MMU_WRITE_TLBACC_ENABLED,
    .dstate = &_TRACE_NIOS2_MMU_WRITE_TLBACC_DSTATE 
};
TraceEvent _TRACE_NIOS2_MMU_WRITE_TLBMISC_EVENT = {
    .id = 0,
    .vcpu_id = TRACE_VCPU_EVENT_NONE,
    .name = "nios2_mmu_write_tlbmisc",
    .sstate = TRACE_NIOS2_MMU_WRITE_TLBMISC_ENABLED,
    .dstate = &_TRACE_NIOS2_MMU_WRITE_TLBMISC_DSTATE 
};
TraceEvent _TRACE_NIOS2_MMU_WRITE_PTEADDR_EVENT = {
    .id = 0,
    .vcpu_id = TRACE_VCPU_EVENT_NONE,
    .name = "nios2_mmu_write_pteaddr",
    .sstate = TRACE_NIOS2_MMU_WRITE_PTEADDR_ENABLED,
    .dstate = &_TRACE_NIOS2_MMU_WRITE_PTEADDR_DSTATE 
};
TraceEvent *target_nios2_trace_events[] = {
    &_TRACE_NIOS2_MMU_TRANSLATE_MISS_EVENT,
    &_TRACE_NIOS2_MMU_TRANSLATE_HIT_EVENT,
    &_TRACE_NIOS2_MMU_FLUSH_PID_MISS_EVENT,
    &_TRACE_NIOS2_MMU_FLUSH_PID_HIT_EVENT,
    &_TRACE_NIOS2_MMU_WRITE_TLBACC_EVENT,
    &_TRACE_NIOS2_MMU_WRITE_TLBMISC_EVENT,
    &_TRACE_NIOS2_MMU_WRITE_PTEADDR_EVENT,
  NULL,
};

static void trace_target_nios2_register_events(void)
{
    trace_event_register_group(target_nios2_trace_events);
}
trace_init(trace_target_nios2_register_events)
