// Automatically generated file. DO NOT EDIT.
// Generated by gen-device-avr.go from ATtiny3217.atdf, see http://packs.download.atmel.com/

//go:build avr && attiny3217

// Device information for the ATtiny3217.
package avr

import (
	"runtime/volatile"
	"unsafe"
)

// Some information about this device.
const (
	DEVICE = "ATtiny3217"
	ARCH   = "AVR8X"
	FAMILY = "AVR TINY"
)

// Interrupts
const (
	IRQ_NMI    = 1  //
	IRQ_VLM    = 2  //
	IRQ_PORT   = 3  //
	IRQ_PORT   = 4  //
	IRQ_PORT   = 5  //
	IRQ_CNT    = 6  //
	IRQ_PIT    = 7  //
	IRQ_LUNF   = 8  //
	IRQ_OVF    = 8  //
	IRQ_HUNF   = 9  //
	IRQ_LCMP0  = 10 //
	IRQ_CMP0   = 10 //
	IRQ_CMP1   = 11 //
	IRQ_LCMP1  = 11 //
	IRQ_CMP2   = 12 //
	IRQ_LCMP2  = 12 //
	IRQ_INT    = 13 //
	IRQ_INT    = 14 //
	IRQ_OVF    = 15 //
	IRQ_TRIG   = 16 //
	IRQ_AC     = 17 //
	IRQ_AC     = 18 //
	IRQ_AC     = 19 //
	IRQ_RESRDY = 20 //
	IRQ_WCOMP  = 21 //
	IRQ_RESRDY = 22 //
	IRQ_WCOMP  = 23 //
	IRQ_TWIS   = 24 //
	IRQ_TWIM   = 25 //
	IRQ_INT    = 26 //
	IRQ_RXC    = 27 //
	IRQ_DRE    = 28 //
	IRQ_TXC    = 29 //
	IRQ_EE     = 30 //
	IRQ_max    = 30 // Highest interrupt number on this device.
)

// Pseudo function call that is replaced by the compiler with the actual
// functions registered through interrupt.New.
//
//go:linkname callHandlers runtime/interrupt.callHandlers
func callHandlers(num int)

//export __vector_NMI
//go:interrupt
func interruptNMI() {
	callHandlers(IRQ_NMI)
}

//export __vector_VLM
//go:interrupt
func interruptVLM() {
	callHandlers(IRQ_VLM)
}

//export __vector_PORT
//go:interrupt
func interruptPORT() {
	callHandlers(IRQ_PORT)
}

//export __vector_PORT
//go:interrupt
func interruptPORT() {
	callHandlers(IRQ_PORT)
}

//export __vector_PORT
//go:interrupt
func interruptPORT() {
	callHandlers(IRQ_PORT)
}

//export __vector_CNT
//go:interrupt
func interruptCNT() {
	callHandlers(IRQ_CNT)
}

//export __vector_PIT
//go:interrupt
func interruptPIT() {
	callHandlers(IRQ_PIT)
}

//export __vector_LUNF
//go:interrupt
func interruptLUNF() {
	callHandlers(IRQ_LUNF)
}

//export __vector_OVF
//go:interrupt
func interruptOVF() {
	callHandlers(IRQ_OVF)
}

//export __vector_HUNF
//go:interrupt
func interruptHUNF() {
	callHandlers(IRQ_HUNF)
}

//export __vector_LCMP0
//go:interrupt
func interruptLCMP0() {
	callHandlers(IRQ_LCMP0)
}

//export __vector_CMP0
//go:interrupt
func interruptCMP0() {
	callHandlers(IRQ_CMP0)
}

//export __vector_CMP1
//go:interrupt
func interruptCMP1() {
	callHandlers(IRQ_CMP1)
}

//export __vector_LCMP1
//go:interrupt
func interruptLCMP1() {
	callHandlers(IRQ_LCMP1)
}

//export __vector_CMP2
//go:interrupt
func interruptCMP2() {
	callHandlers(IRQ_CMP2)
}

//export __vector_LCMP2
//go:interrupt
func interruptLCMP2() {
	callHandlers(IRQ_LCMP2)
}

//export __vector_INT
//go:interrupt
func interruptINT() {
	callHandlers(IRQ_INT)
}

//export __vector_INT
//go:interrupt
func interruptINT() {
	callHandlers(IRQ_INT)
}

//export __vector_OVF
//go:interrupt
func interruptOVF() {
	callHandlers(IRQ_OVF)
}

//export __vector_TRIG
//go:interrupt
func interruptTRIG() {
	callHandlers(IRQ_TRIG)
}

//export __vector_AC
//go:interrupt
func interruptAC() {
	callHandlers(IRQ_AC)
}

//export __vector_AC
//go:interrupt
func interruptAC() {
	callHandlers(IRQ_AC)
}

//export __vector_AC
//go:interrupt
func interruptAC() {
	callHandlers(IRQ_AC)
}

//export __vector_RESRDY
//go:interrupt
func interruptRESRDY() {
	callHandlers(IRQ_RESRDY)
}

//export __vector_WCOMP
//go:interrupt
func interruptWCOMP() {
	callHandlers(IRQ_WCOMP)
}

//export __vector_RESRDY
//go:interrupt
func interruptRESRDY() {
	callHandlers(IRQ_RESRDY)
}

//export __vector_WCOMP
//go:interrupt
func interruptWCOMP() {
	callHandlers(IRQ_WCOMP)
}

//export __vector_TWIS
//go:interrupt
func interruptTWIS() {
	callHandlers(IRQ_TWIS)
}

//export __vector_TWIM
//go:interrupt
func interruptTWIM() {
	callHandlers(IRQ_TWIM)
}

//export __vector_INT
//go:interrupt
func interruptINT() {
	callHandlers(IRQ_INT)
}

//export __vector_RXC
//go:interrupt
func interruptRXC() {
	callHandlers(IRQ_RXC)
}

//export __vector_DRE
//go:interrupt
func interruptDRE() {
	callHandlers(IRQ_DRE)
}

//export __vector_TXC
//go:interrupt
func interruptTXC() {
	callHandlers(IRQ_TXC)
}

//export __vector_EE
//go:interrupt
func interruptEE() {
	callHandlers(IRQ_EE)
}

// Peripherals.
var (
	// Analog Comparator
	CTRLA    = (*volatile.Register8)(unsafe.Pointer(uintptr(0x0)))
	INTCTRL  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x6)))
	MUXCTRLA = (*volatile.Register8)(unsafe.Pointer(uintptr(0x2)))
	STATUS   = (*volatile.Register8)(unsafe.Pointer(uintptr(0x7)))

	// Analog to Digital Converter
	CALIB    = (*volatile.Register8)(unsafe.Pointer(uintptr(0x16)))
	COMMAND  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x8)))
	CTRLB    = (*volatile.Register8)(unsafe.Pointer(uintptr(0x1)))
	CTRLC    = (*volatile.Register8)(unsafe.Pointer(uintptr(0x2)))
	CTRLD    = (*volatile.Register8)(unsafe.Pointer(uintptr(0x3)))
	CTRLE    = (*volatile.Register8)(unsafe.Pointer(uintptr(0x4)))
	DBGCTRL  = (*volatile.Register8)(unsafe.Pointer(uintptr(0xc)))
	EVCTRL   = (*volatile.Register8)(unsafe.Pointer(uintptr(0x9)))
	INTFLAGS = (*volatile.Register8)(unsafe.Pointer(uintptr(0xb)))
	MUXPOS   = (*volatile.Register8)(unsafe.Pointer(uintptr(0x6)))
	RESL     = (*volatile.Register8)(unsafe.Pointer(uintptr(0x10)))
	RESH     = (*volatile.Register8)(unsafe.Pointer(uintptr(0x11)))
	SAMPCTRL = (*volatile.Register8)(unsafe.Pointer(uintptr(0x5)))
	TEMP     = (*volatile.Register8)(unsafe.Pointer(uintptr(0xd)))
	WINHTL   = (*volatile.Register8)(unsafe.Pointer(uintptr(0x14)))
	WINHTH   = (*volatile.Register8)(unsafe.Pointer(uintptr(0x15)))
	WINLTL   = (*volatile.Register8)(unsafe.Pointer(uintptr(0x12)))
	WINLTH   = (*volatile.Register8)(unsafe.Pointer(uintptr(0x13)))

	// Bod interface
	VLMCTRLA = (*volatile.Register8)(unsafe.Pointer(uintptr(0x8)))

	// Configurable Custom Logic
	LUT0CTRLA = (*volatile.Register8)(unsafe.Pointer(uintptr(0x5)))
	LUT0CTRLB = (*volatile.Register8)(unsafe.Pointer(uintptr(0x6)))
	LUT0CTRLC = (*volatile.Register8)(unsafe.Pointer(uintptr(0x7)))
	LUT1CTRLA = (*volatile.Register8)(unsafe.Pointer(uintptr(0x9)))
	LUT1CTRLB = (*volatile.Register8)(unsafe.Pointer(uintptr(0xa)))
	LUT1CTRLC = (*volatile.Register8)(unsafe.Pointer(uintptr(0xb)))
	SEQCTRL0  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x1)))
	TRUTH0    = (*volatile.Register8)(unsafe.Pointer(uintptr(0x8)))
	TRUTH1    = (*volatile.Register8)(unsafe.Pointer(uintptr(0xc)))

	// Clock controller
	MCLKCTRLA    = (*volatile.Register8)(unsafe.Pointer(uintptr(0x0)))
	MCLKCTRLB    = (*volatile.Register8)(unsafe.Pointer(uintptr(0x1)))
	MCLKLOCK     = (*volatile.Register8)(unsafe.Pointer(uintptr(0x2)))
	MCLKSTATUS   = (*volatile.Register8)(unsafe.Pointer(uintptr(0x3)))
	OSC20MCALIBA = (*volatile.Register8)(unsafe.Pointer(uintptr(0x11)))
	OSC20MCALIBB = (*volatile.Register8)(unsafe.Pointer(uintptr(0x12)))
	OSC20MCTRLA  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x10)))
	OSC32KCTRLA  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x18)))
	XOSC32KCTRLA = (*volatile.Register8)(unsafe.Pointer(uintptr(0x1c)))

	// CPU
	CCP  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x4)))
	SPH  = (*volatile.Register8)(unsafe.Pointer(uintptr(0xe)))
	SPL  = (*volatile.Register8)(unsafe.Pointer(uintptr(0xd)))
	SREG = (*volatile.Register8)(unsafe.Pointer(uintptr(0xf)))

	// Interrupt Controller
	LVL0PRI = (*volatile.Register8)(unsafe.Pointer(uintptr(0x2)))
	LVL1VEC = (*volatile.Register8)(unsafe.Pointer(uintptr(0x3)))

	// CRCSCAN

	// Digital to Analog Converter
	DATA = (*volatile.Register8)(unsafe.Pointer(uintptr(0x1)))

	// Event System
	ASYNCCH0    = (*volatile.Register8)(unsafe.Pointer(uintptr(0x2)))
	ASYNCCH1    = (*volatile.Register8)(unsafe.Pointer(uintptr(0x3)))
	ASYNCCH2    = (*volatile.Register8)(unsafe.Pointer(uintptr(0x4)))
	ASYNCCH3    = (*volatile.Register8)(unsafe.Pointer(uintptr(0x5)))
	ASYNCSTROBE = (*volatile.Register8)(unsafe.Pointer(uintptr(0x0)))
	ASYNCUSER0  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x12)))
	ASYNCUSER1  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x13)))
	ASYNCUSER2  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x14)))
	ASYNCUSER3  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x15)))
	ASYNCUSER4  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x16)))
	ASYNCUSER5  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x17)))
	ASYNCUSER6  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x18)))
	ASYNCUSER7  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x19)))
	ASYNCUSER8  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x1a)))
	ASYNCUSER9  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x1b)))
	ASYNCUSER10 = (*volatile.Register8)(unsafe.Pointer(uintptr(0x1c)))
	ASYNCUSER11 = (*volatile.Register8)(unsafe.Pointer(uintptr(0x1d)))
	ASYNCUSER12 = (*volatile.Register8)(unsafe.Pointer(uintptr(0x1e)))
	SYNCCH0     = (*volatile.Register8)(unsafe.Pointer(uintptr(0xa)))
	SYNCCH1     = (*volatile.Register8)(unsafe.Pointer(uintptr(0xb)))
	SYNCSTROBE  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x1)))
	SYNCUSER0   = (*volatile.Register8)(unsafe.Pointer(uintptr(0x22)))
	SYNCUSER1   = (*volatile.Register8)(unsafe.Pointer(uintptr(0x23)))

	// Fuses
	APPEND  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x7)))
	BODCFG  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x1)))
	BOOTEND = (*volatile.Register8)(unsafe.Pointer(uintptr(0x8)))
	OSCCFG  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x2)))
	SYSCFG0 = (*volatile.Register8)(unsafe.Pointer(uintptr(0x5)))
	SYSCFG1 = (*volatile.Register8)(unsafe.Pointer(uintptr(0x6)))
	TCD0CFG = (*volatile.Register8)(unsafe.Pointer(uintptr(0x4)))
	WDTCFG  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x0)))

	// General Purpose IO
	GPIOR0 = (*volatile.Register8)(unsafe.Pointer(uintptr(0x0)))
	GPIOR1 = (*volatile.Register8)(unsafe.Pointer(uintptr(0x1)))
	GPIOR2 = (*volatile.Register8)(unsafe.Pointer(uintptr(0x2)))
	GPIOR3 = (*volatile.Register8)(unsafe.Pointer(uintptr(0x3)))

	// Lockbit
	LOCKBIT = (*volatile.Register8)(unsafe.Pointer(uintptr(0x0)))

	// Non-volatile Memory Controller
	ADDRL = (*volatile.Register8)(unsafe.Pointer(uintptr(0x8)))
	ADDRH = (*volatile.Register8)(unsafe.Pointer(uintptr(0x9)))

	// I/O Ports
	DIR      = (*volatile.Register8)(unsafe.Pointer(uintptr(0x0)))
	DIRCLR   = (*volatile.Register8)(unsafe.Pointer(uintptr(0x2)))
	DIRSET   = (*volatile.Register8)(unsafe.Pointer(uintptr(0x1)))
	DIRTGL   = (*volatile.Register8)(unsafe.Pointer(uintptr(0x3)))
	IN       = (*volatile.Register8)(unsafe.Pointer(uintptr(0x8)))
	OUT      = (*volatile.Register8)(unsafe.Pointer(uintptr(0x4)))
	OUTCLR   = (*volatile.Register8)(unsafe.Pointer(uintptr(0x6)))
	OUTSET   = (*volatile.Register8)(unsafe.Pointer(uintptr(0x5)))
	OUTTGL   = (*volatile.Register8)(unsafe.Pointer(uintptr(0x7)))
	PIN0CTRL = (*volatile.Register8)(unsafe.Pointer(uintptr(0x10)))
	PIN1CTRL = (*volatile.Register8)(unsafe.Pointer(uintptr(0x11)))
	PIN2CTRL = (*volatile.Register8)(unsafe.Pointer(uintptr(0x12)))
	PIN3CTRL = (*volatile.Register8)(unsafe.Pointer(uintptr(0x13)))
	PIN4CTRL = (*volatile.Register8)(unsafe.Pointer(uintptr(0x14)))
	PIN5CTRL = (*volatile.Register8)(unsafe.Pointer(uintptr(0x15)))
	PIN6CTRL = (*volatile.Register8)(unsafe.Pointer(uintptr(0x16)))
	PIN7CTRL = (*volatile.Register8)(unsafe.Pointer(uintptr(0x17)))

	// Port Multiplexer

	// Peripherial Touch Controller

	// Reset controller
	RSTFR = (*volatile.Register8)(unsafe.Pointer(uintptr(0x0)))
	SWRR  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x1)))

	// Real-Time Counter
	CLKSEL      = (*volatile.Register8)(unsafe.Pointer(uintptr(0x7)))
	CMPL        = (*volatile.Register8)(unsafe.Pointer(uintptr(0xc)))
	CMPH        = (*volatile.Register8)(unsafe.Pointer(uintptr(0xd)))
	CNTL        = (*volatile.Register8)(unsafe.Pointer(uintptr(0x8)))
	CNTH        = (*volatile.Register8)(unsafe.Pointer(uintptr(0x9)))
	PERL        = (*volatile.Register8)(unsafe.Pointer(uintptr(0xa)))
	PERH        = (*volatile.Register8)(unsafe.Pointer(uintptr(0xb)))
	PITCTRLA    = (*volatile.Register8)(unsafe.Pointer(uintptr(0x10)))
	PITDBGCTRL  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x15)))
	PITINTCTRL  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x12)))
	PITINTFLAGS = (*volatile.Register8)(unsafe.Pointer(uintptr(0x13)))
	PITSTATUS   = (*volatile.Register8)(unsafe.Pointer(uintptr(0x11)))

	// Signature row
	DEVICEID0  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x0)))
	DEVICEID1  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x1)))
	DEVICEID2  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x2)))
	OSC16ERR3V = (*volatile.Register8)(unsafe.Pointer(uintptr(0x22)))
	OSC16ERR5V = (*volatile.Register8)(unsafe.Pointer(uintptr(0x23)))
	OSC20ERR3V = (*volatile.Register8)(unsafe.Pointer(uintptr(0x24)))
	OSC20ERR5V = (*volatile.Register8)(unsafe.Pointer(uintptr(0x25)))
	SERNUM0    = (*volatile.Register8)(unsafe.Pointer(uintptr(0x3)))
	SERNUM1    = (*volatile.Register8)(unsafe.Pointer(uintptr(0x4)))
	SERNUM2    = (*volatile.Register8)(unsafe.Pointer(uintptr(0x5)))
	SERNUM3    = (*volatile.Register8)(unsafe.Pointer(uintptr(0x6)))
	SERNUM4    = (*volatile.Register8)(unsafe.Pointer(uintptr(0x7)))
	SERNUM5    = (*volatile.Register8)(unsafe.Pointer(uintptr(0x8)))
	SERNUM6    = (*volatile.Register8)(unsafe.Pointer(uintptr(0x9)))
	SERNUM7    = (*volatile.Register8)(unsafe.Pointer(uintptr(0xa)))
	SERNUM8    = (*volatile.Register8)(unsafe.Pointer(uintptr(0xb)))
	SERNUM9    = (*volatile.Register8)(unsafe.Pointer(uintptr(0xc)))
	TEMPSENSE0 = (*volatile.Register8)(unsafe.Pointer(uintptr(0x20)))
	TEMPSENSE1 = (*volatile.Register8)(unsafe.Pointer(uintptr(0x21)))

	// Sleep Controller

	// Serial Peripheral Interface

	// System Configuration Registers
	EXTBRK = (*volatile.Register8)(unsafe.Pointer(uintptr(0x2)))
	REVID  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x1)))

	// 16-bit Timer/Counter Type A
	CMP0L    = (*volatile.Register8)(unsafe.Pointer(uintptr(0x28)))
	CMP0H    = (*volatile.Register8)(unsafe.Pointer(uintptr(0x29)))
	CMP0BUFL = (*volatile.Register8)(unsafe.Pointer(uintptr(0x38)))
	CMP0BUFH = (*volatile.Register8)(unsafe.Pointer(uintptr(0x39)))
	CMP1L    = (*volatile.Register8)(unsafe.Pointer(uintptr(0x2a)))
	CMP1H    = (*volatile.Register8)(unsafe.Pointer(uintptr(0x2b)))
	CMP1BUFL = (*volatile.Register8)(unsafe.Pointer(uintptr(0x3a)))
	CMP1BUFH = (*volatile.Register8)(unsafe.Pointer(uintptr(0x3b)))
	CMP2L    = (*volatile.Register8)(unsafe.Pointer(uintptr(0x2c)))
	CMP2H    = (*volatile.Register8)(unsafe.Pointer(uintptr(0x2d)))
	CMP2BUFL = (*volatile.Register8)(unsafe.Pointer(uintptr(0x3c)))
	CMP2BUFH = (*volatile.Register8)(unsafe.Pointer(uintptr(0x3d)))
	CTRLECLR = (*volatile.Register8)(unsafe.Pointer(uintptr(0x4)))
	CTRLESET = (*volatile.Register8)(unsafe.Pointer(uintptr(0x5)))
	CTRLFCLR = (*volatile.Register8)(unsafe.Pointer(uintptr(0x6)))
	CTRLFSET = (*volatile.Register8)(unsafe.Pointer(uintptr(0x7)))
	PERBUFL  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x36)))
	PERBUFH  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x37)))
	HCMP0    = (*volatile.Register8)(unsafe.Pointer(uintptr(0x29)))
	HCMP1    = (*volatile.Register8)(unsafe.Pointer(uintptr(0x2b)))
	HCMP2    = (*volatile.Register8)(unsafe.Pointer(uintptr(0x2d)))
	HCNT     = (*volatile.Register8)(unsafe.Pointer(uintptr(0x21)))
	HPER     = (*volatile.Register8)(unsafe.Pointer(uintptr(0x27)))
	LCMP0    = (*volatile.Register8)(unsafe.Pointer(uintptr(0x28)))
	LCMP1    = (*volatile.Register8)(unsafe.Pointer(uintptr(0x2a)))
	LCMP2    = (*volatile.Register8)(unsafe.Pointer(uintptr(0x2c)))
	LCNT     = (*volatile.Register8)(unsafe.Pointer(uintptr(0x20)))
	LPER     = (*volatile.Register8)(unsafe.Pointer(uintptr(0x26)))

	// 16-bit Timer Type B
	CCMPL = (*volatile.Register8)(unsafe.Pointer(uintptr(0xc)))
	CCMPH = (*volatile.Register8)(unsafe.Pointer(uintptr(0xd)))

	// Timer Counter D
	CAPTUREAL  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x22)))
	CAPTUREAH  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x23)))
	CAPTUREBL  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x24)))
	CAPTUREBH  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x25)))
	CMPACLRL   = (*volatile.Register8)(unsafe.Pointer(uintptr(0x2a)))
	CMPACLRH   = (*volatile.Register8)(unsafe.Pointer(uintptr(0x2b)))
	CMPASETL   = (*volatile.Register8)(unsafe.Pointer(uintptr(0x28)))
	CMPASETH   = (*volatile.Register8)(unsafe.Pointer(uintptr(0x29)))
	CMPBCLRL   = (*volatile.Register8)(unsafe.Pointer(uintptr(0x2e)))
	CMPBCLRH   = (*volatile.Register8)(unsafe.Pointer(uintptr(0x2f)))
	CMPBSETL   = (*volatile.Register8)(unsafe.Pointer(uintptr(0x2c)))
	CMPBSETH   = (*volatile.Register8)(unsafe.Pointer(uintptr(0x2d)))
	DITCTRL    = (*volatile.Register8)(unsafe.Pointer(uintptr(0x18)))
	DITVAL     = (*volatile.Register8)(unsafe.Pointer(uintptr(0x19)))
	DLYCTRL    = (*volatile.Register8)(unsafe.Pointer(uintptr(0x14)))
	DLYVAL     = (*volatile.Register8)(unsafe.Pointer(uintptr(0x15)))
	EVCTRLA    = (*volatile.Register8)(unsafe.Pointer(uintptr(0x8)))
	EVCTRLB    = (*volatile.Register8)(unsafe.Pointer(uintptr(0x9)))
	FAULTCTRL  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x12)))
	INPUTCTRLA = (*volatile.Register8)(unsafe.Pointer(uintptr(0x10)))
	INPUTCTRLB = (*volatile.Register8)(unsafe.Pointer(uintptr(0x11)))

	// Two-Wire Interface
	MADDR     = (*volatile.Register8)(unsafe.Pointer(uintptr(0x7)))
	MBAUD     = (*volatile.Register8)(unsafe.Pointer(uintptr(0x6)))
	MCTRLA    = (*volatile.Register8)(unsafe.Pointer(uintptr(0x3)))
	MCTRLB    = (*volatile.Register8)(unsafe.Pointer(uintptr(0x4)))
	MDATA     = (*volatile.Register8)(unsafe.Pointer(uintptr(0x8)))
	MSTATUS   = (*volatile.Register8)(unsafe.Pointer(uintptr(0x5)))
	SADDR     = (*volatile.Register8)(unsafe.Pointer(uintptr(0xc)))
	SADDRMASK = (*volatile.Register8)(unsafe.Pointer(uintptr(0xe)))
	SCTRLA    = (*volatile.Register8)(unsafe.Pointer(uintptr(0x9)))
	SCTRLB    = (*volatile.Register8)(unsafe.Pointer(uintptr(0xa)))
	SDATA     = (*volatile.Register8)(unsafe.Pointer(uintptr(0xd)))
	SSTATUS   = (*volatile.Register8)(unsafe.Pointer(uintptr(0xb)))

	// Universal Synchronous and Asynchronous Receiver and Transmitter
	BAUDL    = (*volatile.Register8)(unsafe.Pointer(uintptr(0x8)))
	BAUDH    = (*volatile.Register8)(unsafe.Pointer(uintptr(0x9)))
	RXDATAH  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x1)))
	RXDATAL  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x0)))
	RXPLCTRL = (*volatile.Register8)(unsafe.Pointer(uintptr(0xe)))
	TXDATAH  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x3)))
	TXDATAL  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x2)))
	TXPLCTRL = (*volatile.Register8)(unsafe.Pointer(uintptr(0xd)))

	// User Row
	USERROW0  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x0)))
	USERROW1  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x1)))
	USERROW2  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x2)))
	USERROW3  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x3)))
	USERROW4  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x4)))
	USERROW5  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x5)))
	USERROW6  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x6)))
	USERROW7  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x7)))
	USERROW8  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x8)))
	USERROW9  = (*volatile.Register8)(unsafe.Pointer(uintptr(0x9)))
	USERROW10 = (*volatile.Register8)(unsafe.Pointer(uintptr(0xa)))
	USERROW11 = (*volatile.Register8)(unsafe.Pointer(uintptr(0xb)))
	USERROW12 = (*volatile.Register8)(unsafe.Pointer(uintptr(0xc)))
	USERROW13 = (*volatile.Register8)(unsafe.Pointer(uintptr(0xd)))
	USERROW14 = (*volatile.Register8)(unsafe.Pointer(uintptr(0xe)))
	USERROW15 = (*volatile.Register8)(unsafe.Pointer(uintptr(0xf)))
	USERROW16 = (*volatile.Register8)(unsafe.Pointer(uintptr(0x10)))
	USERROW17 = (*volatile.Register8)(unsafe.Pointer(uintptr(0x11)))
	USERROW18 = (*volatile.Register8)(unsafe.Pointer(uintptr(0x12)))
	USERROW19 = (*volatile.Register8)(unsafe.Pointer(uintptr(0x13)))
	USERROW20 = (*volatile.Register8)(unsafe.Pointer(uintptr(0x14)))
	USERROW21 = (*volatile.Register8)(unsafe.Pointer(uintptr(0x15)))
	USERROW22 = (*volatile.Register8)(unsafe.Pointer(uintptr(0x16)))
	USERROW23 = (*volatile.Register8)(unsafe.Pointer(uintptr(0x17)))
	USERROW24 = (*volatile.Register8)(unsafe.Pointer(uintptr(0x18)))
	USERROW25 = (*volatile.Register8)(unsafe.Pointer(uintptr(0x19)))
	USERROW26 = (*volatile.Register8)(unsafe.Pointer(uintptr(0x1a)))
	USERROW27 = (*volatile.Register8)(unsafe.Pointer(uintptr(0x1b)))
	USERROW28 = (*volatile.Register8)(unsafe.Pointer(uintptr(0x1c)))
	USERROW29 = (*volatile.Register8)(unsafe.Pointer(uintptr(0x1d)))
	USERROW30 = (*volatile.Register8)(unsafe.Pointer(uintptr(0x1e)))
	USERROW31 = (*volatile.Register8)(unsafe.Pointer(uintptr(0x1f)))

	// Virtual Ports

	// Voltage reference

	// Watch-Dog Timer
)

// Bitfields for AC: Analog Comparator
const (
	// CTRLA: Control A
	CTRLA_ENABLE         = 0x1  // Enable
	CTRLA_ENABLE_Msk     = 0x1  // Enable
	CTRLA_HYSMODE0       = 0x2  // Hysteresis Mode
	CTRLA_HYSMODE1       = 0x4  // Hysteresis Mode
	CTRLA_HYSMODE_Msk    = 0x6  // Hysteresis Mode
	CTRLA_INTMODE0       = 0x10 // Interrupt Mode
	CTRLA_INTMODE1       = 0x20 // Interrupt Mode
	CTRLA_INTMODE_Msk    = 0x30 // Interrupt Mode
	CTRLA_LPMODE         = 0x8  // Low Power Mode
	CTRLA_LPMODE_Msk     = 0x8  // Low Power Mode
	CTRLA_OUTEN          = 0x40 // Output Buffer Enable
	CTRLA_OUTEN_Msk      = 0x40 // Output Buffer Enable
	CTRLA_RUNSTDBY       = 0x80 // Run in Standby Mode
	CTRLA_RUNSTDBY_Msk   = 0x80 // Run in Standby Mode
	CTRLA_FREERUN        = 0x2  // ADC Freerun mode
	CTRLA_FREERUN_Msk    = 0x2  // ADC Freerun mode
	CTRLA_RESSEL         = 0x4  // ADC Resolution
	CTRLA_RESSEL_Msk     = 0x4  // ADC Resolution
	CTRLA_RUNSTBY        = 0x80 // Run standby mode
	CTRLA_RUNSTBY_Msk    = 0x80 // Run standby mode
	CTRLA_ACTIVE0        = 0x4  // Operation in active mode
	CTRLA_ACTIVE1        = 0x8  // Operation in active mode
	CTRLA_ACTIVE_Msk     = 0xc  // Operation in active mode
	CTRLA_SAMPFREQ       = 0x10 // Sample frequency
	CTRLA_SAMPFREQ_Msk   = 0x10 // Sample frequency
	CTRLA_SLEEP0         = 0x1  // Operation in sleep mode
	CTRLA_SLEEP1         = 0x2  // Operation in sleep mode
	CTRLA_SLEEP_Msk      = 0x3  // Operation in sleep mode
	CTRLA_CVT            = 0x20 // Compact Vector Table
	CTRLA_CVT_Msk        = 0x20 // Compact Vector Table
	CTRLA_IVSEL          = 0x40 // Interrupt Vector Select
	CTRLA_IVSEL_Msk      = 0x40 // Interrupt Vector Select
	CTRLA_LVL0RR         = 0x1  // Round-robin Scheduling Enable
	CTRLA_LVL0RR_Msk     = 0x1  // Round-robin Scheduling Enable
	CTRLA_NMIEN          = 0x2  // Enable NMI Trigger
	CTRLA_NMIEN_Msk      = 0x2  // Enable NMI Trigger
	CTRLA_RESET          = 0x80 // Reset CRC scan
	CTRLA_RESET_Msk      = 0x80 // Reset CRC scan
	CTRLA_CMD0           = 0x1  // Command
	CTRLA_CMD1           = 0x2  // Command
	CTRLA_CMD2           = 0x4  // Command
	CTRLA_CMD_Msk        = 0x7  // Command
	CTRLA_EVOUT0         = 0x1  // Event Output 0
	CTRLA_EVOUT0_Msk     = 0x1  // Event Output 0
	CTRLA_EVOUT1         = 0x2  // Event Output 1
	CTRLA_EVOUT1_Msk     = 0x2  // Event Output 1
	CTRLA_EVOUT2         = 0x4  // Event Output 2
	CTRLA_EVOUT2_Msk     = 0x4  // Event Output 2
	CTRLA_LUT0           = 0x10 // Configurable Custom Logic LUT0
	CTRLA_LUT0_Msk       = 0x10 // Configurable Custom Logic LUT0
	CTRLA_LUT1           = 0x20 // Configurable Custom Logic LUT1
	CTRLA_LUT1_Msk       = 0x20 // Configurable Custom Logic LUT1
	CTRLA_PRESCALER0     = 0x8  // Prescaling Factor
	CTRLA_PRESCALER1     = 0x10 // Prescaling Factor
	CTRLA_PRESCALER2     = 0x20 // Prescaling Factor
	CTRLA_PRESCALER3     = 0x40 // Prescaling Factor
	CTRLA_PRESCALER_Msk  = 0x78 // Prescaling Factor
	CTRLA_RTCEN          = 0x1  // Enable
	CTRLA_RTCEN_Msk      = 0x1  // Enable
	CTRLA_SEN            = 0x1  // Sleep enable
	CTRLA_SEN_Msk        = 0x1  // Sleep enable
	CTRLA_SMODE0         = 0x2  // Sleep mode
	CTRLA_SMODE1         = 0x4  // Sleep mode
	CTRLA_SMODE_Msk      = 0x6  // Sleep mode
	CTRLA_CLK2X          = 0x10 // Enable Double Speed
	CTRLA_CLK2X_Msk      = 0x10 // Enable Double Speed
	CTRLA_DORD           = 0x40 // Data Order Setting
	CTRLA_DORD_Msk       = 0x40 // Data Order Setting
	CTRLA_MASTER         = 0x20 // Master Operation Enable
	CTRLA_MASTER_Msk     = 0x20 // Master Operation Enable
	CTRLA_PRESC0         = 0x2  // Prescaler
	CTRLA_PRESC1         = 0x4  // Prescaler
	CTRLA_PRESC_Msk      = 0x6  // Prescaler
	CTRLA_CLKSEL0        = 0x2  // Clock Selection
	CTRLA_CLKSEL1        = 0x4  // Clock Selection
	CTRLA_CLKSEL2        = 0x8  // Clock Selection
	CTRLA_CLKSEL_Msk     = 0xe  // Clock Selection
	CTRLA_SYNCUPD        = 0x10 // Synchronize Update
	CTRLA_SYNCUPD_Msk    = 0x10 // Synchronize Update
	CTRLA_CNTPRES0       = 0x8  // counter prescaler
	CTRLA_CNTPRES1       = 0x10 // counter prescaler
	CTRLA_CNTPRES_Msk    = 0x18 // counter prescaler
	CTRLA_SYNCPRES0      = 0x2  // Syncronization prescaler
	CTRLA_SYNCPRES1      = 0x4  // Syncronization prescaler
	CTRLA_SYNCPRES_Msk   = 0x6  // Syncronization prescaler
	CTRLA_ABEIE          = 0x4  // Auto-baud Error Interrupt Enable
	CTRLA_ABEIE_Msk      = 0x4  // Auto-baud Error Interrupt Enable
	CTRLA_DREIE          = 0x20 // Data Register Empty Interrupt Enable
	CTRLA_DREIE_Msk      = 0x20 // Data Register Empty Interrupt Enable
	CTRLA_LBME           = 0x8  // Loop-back Mode Enable
	CTRLA_LBME_Msk       = 0x8  // Loop-back Mode Enable
	CTRLA_RS4850         = 0x1  // RS485 Mode internal transmitter
	CTRLA_RS4851         = 0x2  // RS485 Mode internal transmitter
	CTRLA_RS485_Msk      = 0x3  // RS485 Mode internal transmitter
	CTRLA_RXCIE          = 0x80 // Receive Complete Interrupt Enable
	CTRLA_RXCIE_Msk      = 0x80 // Receive Complete Interrupt Enable
	CTRLA_RXSIE          = 0x10 // Receiver Start Frame Interrupt Enable
	CTRLA_RXSIE_Msk      = 0x10 // Receiver Start Frame Interrupt Enable
	CTRLA_TXCIE          = 0x40 // Transmit Complete Interrupt Enable
	CTRLA_TXCIE_Msk      = 0x40 // Transmit Complete Interrupt Enable
	CTRLA_ADC0REFSEL0    = 0x10 // ADC0 reference select
	CTRLA_ADC0REFSEL1    = 0x20 // ADC0 reference select
	CTRLA_ADC0REFSEL2    = 0x40 // ADC0 reference select
	CTRLA_ADC0REFSEL_Msk = 0x70 // ADC0 reference select
	CTRLA_DAC0REFSEL0    = 0x1  // DAC0/AC0 reference select
	CTRLA_DAC0REFSEL1    = 0x2  // DAC0/AC0 reference select
	CTRLA_DAC0REFSEL2    = 0x4  // DAC0/AC0 reference select
	CTRLA_DAC0REFSEL_Msk = 0x7  // DAC0/AC0 reference select
	CTRLA_PERIOD0        = 0x1  // Period
	CTRLA_PERIOD1        = 0x2  // Period
	CTRLA_PERIOD2        = 0x4  // Period
	CTRLA_PERIOD3        = 0x8  // Period
	CTRLA_PERIOD_Msk     = 0xf  // Period
	CTRLA_WINDOW0        = 0x10 // Window
	CTRLA_WINDOW1        = 0x20 // Window
	CTRLA_WINDOW2        = 0x40 // Window
	CTRLA_WINDOW3        = 0x80 // Window
	CTRLA_WINDOW_Msk     = 0xf0 // Window

	// INTCTRL: Interrupt Control
	INTCTRL_CMP         = 0x1  // Analog Comparator 0 Interrupt Enable
	INTCTRL_CMP_Msk     = 0x1  // Analog Comparator 0 Interrupt Enable
	INTCTRL_RESRDY      = 0x1  // Result Ready Interrupt Enable
	INTCTRL_RESRDY_Msk  = 0x1  // Result Ready Interrupt Enable
	INTCTRL_WCMP        = 0x2  // Window Comparator Interrupt Enable
	INTCTRL_WCMP_Msk    = 0x2  // Window Comparator Interrupt Enable
	INTCTRL_VLMCFG0     = 0x2  // Configuration
	INTCTRL_VLMCFG1     = 0x4  // Configuration
	INTCTRL_VLMCFG_Msk  = 0x6  // Configuration
	INTCTRL_VLMIE       = 0x1  // voltage level monitor interrrupt enable
	INTCTRL_VLMIE_Msk   = 0x1  // voltage level monitor interrrupt enable
	INTCTRL_EEREADY     = 0x1  // EEPROM Ready
	INTCTRL_EEREADY_Msk = 0x1  // EEPROM Ready
	INTCTRL_OVF         = 0x1  // Overflow Interrupt enable
	INTCTRL_OVF_Msk     = 0x1  // Overflow Interrupt enable
	INTCTRL_DREIE       = 0x20 // Data Register Empty Interrupt Enable
	INTCTRL_DREIE_Msk   = 0x20 // Data Register Empty Interrupt Enable
	INTCTRL_IE          = 0x1  // Interrupt Enable
	INTCTRL_IE_Msk      = 0x1  // Interrupt Enable
	INTCTRL_RXCIE       = 0x80 // Receive Complete Interrupt Enable
	INTCTRL_RXCIE_Msk   = 0x80 // Receive Complete Interrupt Enable
	INTCTRL_SSIE        = 0x10 // Slave Select Trigger Interrupt Enable
	INTCTRL_SSIE_Msk    = 0x10 // Slave Select Trigger Interrupt Enable
	INTCTRL_TXCIE       = 0x40 // Transfer Complete Interrupt Enable
	INTCTRL_TXCIE_Msk   = 0x40 // Transfer Complete Interrupt Enable
	INTCTRL_CMP0        = 0x10 // Compare 0 Interrupt
	INTCTRL_CMP0_Msk    = 0x10 // Compare 0 Interrupt
	INTCTRL_CMP1        = 0x20 // Compare 1 Interrupt
	INTCTRL_CMP1_Msk    = 0x20 // Compare 1 Interrupt
	INTCTRL_CMP2        = 0x40 // Compare 2 Interrupt
	INTCTRL_CMP2_Msk    = 0x40 // Compare 2 Interrupt
	INTCTRL_HUNF        = 0x2  // High Underflow Interrupt Enable
	INTCTRL_HUNF_Msk    = 0x2  // High Underflow Interrupt Enable
	INTCTRL_LCMP0       = 0x10 // Low Compare 0 Interrupt Enable
	INTCTRL_LCMP0_Msk   = 0x10 // Low Compare 0 Interrupt Enable
	INTCTRL_LCMP1       = 0x20 // Low Compare 1 Interrupt Enable
	INTCTRL_LCMP1_Msk   = 0x20 // Low Compare 1 Interrupt Enable
	INTCTRL_LCMP2       = 0x40 // Low Compare 2 Interrupt Enable
	INTCTRL_LCMP2_Msk   = 0x40 // Low Compare 2 Interrupt Enable
	INTCTRL_LUNF        = 0x1  // Low Underflow Interrupt Enable
	INTCTRL_LUNF_Msk    = 0x1  // Low Underflow Interrupt Enable
	INTCTRL_CAPT        = 0x1  // Capture or Timeout
	INTCTRL_CAPT_Msk    = 0x1  // Capture or Timeout
	INTCTRL_TRIGA       = 0x4  // Trigger A interrupt enable
	INTCTRL_TRIGA_Msk   = 0x4  // Trigger A interrupt enable
	INTCTRL_TRIGB       = 0x8  // Trigger B interrupt enable
	INTCTRL_TRIGB_Msk   = 0x8  // Trigger B interrupt enable

	// MUXCTRLA: Mux Control A
	MUXCTRLA_INVERT     = 0x80 // Invert AC Output
	MUXCTRLA_INVERT_Msk = 0x80 // Invert AC Output
	MUXCTRLA_MUXNEG0    = 0x1  // Negative Input MUX Selection
	MUXCTRLA_MUXNEG1    = 0x2  // Negative Input MUX Selection
	MUXCTRLA_MUXNEG_Msk = 0x3  // Negative Input MUX Selection
	MUXCTRLA_MUXPOS0    = 0x8  // Positive Input MUX Selection
	MUXCTRLA_MUXPOS1    = 0x10 // Positive Input MUX Selection
	MUXCTRLA_MUXPOS_Msk = 0x18 // Positive Input MUX Selection

	// STATUS: Status
	STATUS_CMP           = 0x1  // Analog Comparator Interrupt Flag
	STATUS_CMP_Msk       = 0x1  // Analog Comparator Interrupt Flag
	STATUS_STATE         = 0x10 // Analog Comparator State
	STATUS_STATE_Msk     = 0x10 // Analog Comparator State
	STATUS_VLMS          = 0x1  // Voltage level monitor status
	STATUS_VLMS_Msk      = 0x1  // Voltage level monitor status
	STATUS_LVL0EX        = 0x1  // Level 0 Interrupt Executing
	STATUS_LVL0EX_Msk    = 0x1  // Level 0 Interrupt Executing
	STATUS_LVL1EX        = 0x2  // Level 1 Interrupt Executing
	STATUS_LVL1EX_Msk    = 0x2  // Level 1 Interrupt Executing
	STATUS_NMIEX         = 0x80 // Non-maskable Interrupt Executing
	STATUS_NMIEX_Msk     = 0x80 // Non-maskable Interrupt Executing
	STATUS_BUSY          = 0x1  // CRC Busy
	STATUS_BUSY_Msk      = 0x1  // CRC Busy
	STATUS_OK            = 0x2  // CRC Ok
	STATUS_OK_Msk        = 0x2  // CRC Ok
	STATUS_EEBUSY        = 0x2  // EEPROM busy
	STATUS_EEBUSY_Msk    = 0x2  // EEPROM busy
	STATUS_FBUSY         = 0x1  // Flash busy
	STATUS_FBUSY_Msk     = 0x1  // Flash busy
	STATUS_WRERROR       = 0x4  // Write error
	STATUS_WRERROR_Msk   = 0x4  // Write error
	STATUS_CMPBUSY       = 0x8  // Comparator Synchronization Busy Flag
	STATUS_CMPBUSY_Msk   = 0x8  // Comparator Synchronization Busy Flag
	STATUS_CNTBUSY       = 0x2  // Count Synchronization Busy Flag
	STATUS_CNTBUSY_Msk   = 0x2  // Count Synchronization Busy Flag
	STATUS_CTRLABUSY     = 0x1  // CTRLA Synchronization Busy Flag
	STATUS_CTRLABUSY_Msk = 0x1  // CTRLA Synchronization Busy Flag
	STATUS_PERBUSY       = 0x4  // Period Synchronization Busy Flag
	STATUS_PERBUSY_Msk   = 0x4  // Period Synchronization Busy Flag
	STATUS_RUN           = 0x1  // Run
	STATUS_RUN_Msk       = 0x1  // Run
	STATUS_CMDRDY        = 0x2  // Command ready
	STATUS_CMDRDY_Msk    = 0x2  // Command ready
	STATUS_ENRDY         = 0x1  // Enable ready
	STATUS_ENRDY_Msk     = 0x1  // Enable ready
	STATUS_PWMACTA       = 0x40 // PWM activity on A
	STATUS_PWMACTA_Msk   = 0x40 // PWM activity on A
	STATUS_PWMACTB       = 0x80 // PWM activity on B
	STATUS_PWMACTB_Msk   = 0x80 // PWM activity on B
	STATUS_BDF           = 0x2  // Break Detected Flag
	STATUS_BDF_Msk       = 0x2  // Break Detected Flag
	STATUS_DREIF         = 0x20 // Data Register Empty Flag
	STATUS_DREIF_Msk     = 0x20 // Data Register Empty Flag
	STATUS_ISFIF         = 0x8  // Inconsistent Sync Field Interrupt Flag
	STATUS_ISFIF_Msk     = 0x8  // Inconsistent Sync Field Interrupt Flag
	STATUS_RXCIF         = 0x80 // Receive Complete Interrupt Flag
	STATUS_RXCIF_Msk     = 0x80 // Receive Complete Interrupt Flag
	STATUS_RXSIF         = 0x10 // Receive Start Interrupt
	STATUS_RXSIF_Msk     = 0x10 // Receive Start Interrupt
	STATUS_TXCIF         = 0x40 // Transmit Interrupt Flag
	STATUS_TXCIF_Msk     = 0x40 // Transmit Interrupt Flag
	STATUS_WFB           = 0x1  // Wait For Break
	STATUS_WFB_Msk       = 0x1  // Wait For Break
	STATUS_LOCK          = 0x80 // Lock enable
	STATUS_LOCK_Msk      = 0x80 // Lock enable
	STATUS_SYNCBUSY      = 0x1  // Syncronization busy
	STATUS_SYNCBUSY_Msk  = 0x1  // Syncronization busy
)

// Bitfields for ADC: Analog to Digital Converter
const (
	// CALIB: Calibration
	CALIB_DUTYCYC     = 0x1 // Duty Cycle
	CALIB_DUTYCYC_Msk = 0x1 // Duty Cycle

	// COMMAND: Command
	COMMAND_STCONV     = 0x1 // Start Conversion Operation
	COMMAND_STCONV_Msk = 0x1 // Start Conversion Operation

	// CTRLB: Control B
	CTRLB_SAMPNUM0      = 0x1  // Accumulation Samples
	CTRLB_SAMPNUM1      = 0x2  // Accumulation Samples
	CTRLB_SAMPNUM2      = 0x4  // Accumulation Samples
	CTRLB_SAMPNUM_Msk   = 0x7  // Accumulation Samples
	CTRLB_LVL0          = 0x1  // Bod level
	CTRLB_LVL1          = 0x2  // Bod level
	CTRLB_LVL2          = 0x4  // Bod level
	CTRLB_LVL_Msk       = 0x7  // Bod level
	CTRLB_MODE0         = 0x10 // CRC Flash Access Mode
	CTRLB_MODE1         = 0x20 // CRC Flash Access Mode
	CTRLB_MODE_Msk      = 0x30 // CRC Flash Access Mode
	CTRLB_SRC0          = 0x1  // CRC Source
	CTRLB_SRC1          = 0x2  // CRC Source
	CTRLB_SRC_Msk       = 0x3  // CRC Source
	CTRLB_APCWP         = 0x1  // Application code write protect
	CTRLB_APCWP_Msk     = 0x1  // Application code write protect
	CTRLB_BOOTLOCK      = 0x2  // Boot Lock
	CTRLB_BOOTLOCK_Msk  = 0x2  // Boot Lock
	CTRLB_SPI0          = 0x4  // Port Multiplexer SPI0
	CTRLB_SPI0_Msk      = 0x4  // Port Multiplexer SPI0
	CTRLB_TWI0          = 0x10 // Port Multiplexer TWI0
	CTRLB_TWI0_Msk      = 0x10 // Port Multiplexer TWI0
	CTRLB_USART0        = 0x1  // Port Multiplexer USART0
	CTRLB_USART0_Msk    = 0x1  // Port Multiplexer USART0
	CTRLB_BUFEN         = 0x80 // Buffer Mode Enable
	CTRLB_BUFEN_Msk     = 0x80 // Buffer Mode Enable
	CTRLB_BUFWR         = 0x40 // Buffer Write Mode
	CTRLB_BUFWR_Msk     = 0x40 // Buffer Write Mode
	CTRLB_SSD           = 0x4  // Slave Select Disable
	CTRLB_SSD_Msk       = 0x4  // Slave Select Disable
	CTRLB_ALUPD         = 0x8  // Auto Lock Update
	CTRLB_ALUPD_Msk     = 0x8  // Auto Lock Update
	CTRLB_CMP0EN        = 0x10 // Compare 0 Enable
	CTRLB_CMP0EN_Msk    = 0x10 // Compare 0 Enable
	CTRLB_CMP1EN        = 0x20 // Compare 1 Enable
	CTRLB_CMP1EN_Msk    = 0x20 // Compare 1 Enable
	CTRLB_CMP2EN        = 0x40 // Compare 2 Enable
	CTRLB_CMP2EN_Msk    = 0x40 // Compare 2 Enable
	CTRLB_WGMODE0       = 0x1  // Waveform generation mode
	CTRLB_WGMODE1       = 0x2  // Waveform generation mode
	CTRLB_WGMODE2       = 0x4  // Waveform generation mode
	CTRLB_WGMODE_Msk    = 0x7  // Waveform generation mode
	CTRLB_HCMP0EN       = 0x10 // High Compare 0 Enable
	CTRLB_HCMP0EN_Msk   = 0x10 // High Compare 0 Enable
	CTRLB_HCMP1EN       = 0x20 // High Compare 1 Enable
	CTRLB_HCMP1EN_Msk   = 0x20 // High Compare 1 Enable
	CTRLB_HCMP2EN       = 0x40 // High Compare 2 Enable
	CTRLB_HCMP2EN_Msk   = 0x40 // High Compare 2 Enable
	CTRLB_LCMP0EN       = 0x1  // Low Compare 0 Enable
	CTRLB_LCMP0EN_Msk   = 0x1  // Low Compare 0 Enable
	CTRLB_LCMP1EN       = 0x2  // Low Compare 1 Enable
	CTRLB_LCMP1EN_Msk   = 0x2  // Low Compare 1 Enable
	CTRLB_LCMP2EN       = 0x4  // Low Compare 2 Enable
	CTRLB_LCMP2EN_Msk   = 0x4  // Low Compare 2 Enable
	CTRLB_ASYNC         = 0x40 // Asynchronous Enable
	CTRLB_ASYNC_Msk     = 0x40 // Asynchronous Enable
	CTRLB_CCMPEN        = 0x10 // Pin Output Enable
	CTRLB_CCMPEN_Msk    = 0x10 // Pin Output Enable
	CTRLB_CCMPINIT      = 0x20 // Pin Initial State
	CTRLB_CCMPINIT_Msk  = 0x20 // Pin Initial State
	CTRLB_CNTMODE0      = 0x1  // Timer Mode
	CTRLB_CNTMODE1      = 0x2  // Timer Mode
	CTRLB_CNTMODE2      = 0x4  // Timer Mode
	CTRLB_CNTMODE_Msk   = 0x7  // Timer Mode
	CTRLB_MPCM          = 0x1  // Multi-processor Communication Mode
	CTRLB_MPCM_Msk      = 0x1  // Multi-processor Communication Mode
	CTRLB_ODME          = 0x8  // Open Drain Mode Enable
	CTRLB_ODME_Msk      = 0x8  // Open Drain Mode Enable
	CTRLB_RXEN          = 0x80 // Reciever enable
	CTRLB_RXEN_Msk      = 0x80 // Reciever enable
	CTRLB_RXMODE0       = 0x2  // Receiver Mode
	CTRLB_RXMODE1       = 0x4  // Receiver Mode
	CTRLB_RXMODE_Msk    = 0x6  // Receiver Mode
	CTRLB_SFDEN         = 0x10 // Start Frame Detection Enable
	CTRLB_SFDEN_Msk     = 0x10 // Start Frame Detection Enable
	CTRLB_TXEN          = 0x40 // Transmitter Enable
	CTRLB_TXEN_Msk      = 0x40 // Transmitter Enable
	CTRLB_ADC0REFEN     = 0x2  // ADC0 reference enable
	CTRLB_ADC0REFEN_Msk = 0x2  // ADC0 reference enable
	CTRLB_ADC1REFEN     = 0x10 // ADC1 reference enable
	CTRLB_ADC1REFEN_Msk = 0x10 // ADC1 reference enable
	CTRLB_DAC0REFEN     = 0x1  // DAC0/AC0 reference enable
	CTRLB_DAC0REFEN_Msk = 0x1  // DAC0/AC0 reference enable
	CTRLB_DAC1REFEN     = 0x8  // DAC1/AC1 reference enable
	CTRLB_DAC1REFEN_Msk = 0x8  // DAC1/AC1 reference enable
	CTRLB_DAC2REFEN     = 0x20 // DAC2/AC2 reference enable
	CTRLB_DAC2REFEN_Msk = 0x20 // DAC2/AC2 reference enable

	// CTRLC: Control C
	CTRLC_PRESC0         = 0x1  // Clock Pre-scaler
	CTRLC_PRESC1         = 0x2  // Clock Pre-scaler
	CTRLC_PRESC2         = 0x4  // Clock Pre-scaler
	CTRLC_PRESC_Msk      = 0x7  // Clock Pre-scaler
	CTRLC_REFSEL0        = 0x10 // Reference Selection
	CTRLC_REFSEL1        = 0x20 // Reference Selection
	CTRLC_REFSEL_Msk     = 0x30 // Reference Selection
	CTRLC_SAMPCAP        = 0x40 // Sample Capacitance Selection
	CTRLC_SAMPCAP_Msk    = 0x40 // Sample Capacitance Selection
	CTRLC_TCA00          = 0x1  // Port Multiplexer TCA0 Output 0
	CTRLC_TCA00_Msk      = 0x1  // Port Multiplexer TCA0 Output 0
	CTRLC_TCA01          = 0x2  // Port Multiplexer TCA0 output 1
	CTRLC_TCA01_Msk      = 0x2  // Port Multiplexer TCA0 output 1
	CTRLC_TCA02          = 0x4  // Port Multiplexer TCA0 Output 2
	CTRLC_TCA02_Msk      = 0x4  // Port Multiplexer TCA0 Output 2
	CTRLC_TCA03          = 0x8  // Port Multiplexer TCA0 Output 3
	CTRLC_TCA03_Msk      = 0x8  // Port Multiplexer TCA0 Output 3
	CTRLC_TCA04          = 0x10 // Port Multiplexer TCA0 Output 4
	CTRLC_TCA04_Msk      = 0x10 // Port Multiplexer TCA0 Output 4
	CTRLC_TCA05          = 0x20 // Port Multiplexer TCA0 Output 5
	CTRLC_TCA05_Msk      = 0x20 // Port Multiplexer TCA0 Output 5
	CTRLC_CMP0OV         = 0x1  // Compare 0 Waveform Output Value
	CTRLC_CMP0OV_Msk     = 0x1  // Compare 0 Waveform Output Value
	CTRLC_CMP1OV         = 0x2  // Compare 1 Waveform Output Value
	CTRLC_CMP1OV_Msk     = 0x2  // Compare 1 Waveform Output Value
	CTRLC_CMP2OV         = 0x4  // Compare 2 Waveform Output Value
	CTRLC_CMP2OV_Msk     = 0x4  // Compare 2 Waveform Output Value
	CTRLC_HCMP0OV        = 0x10 // High Compare 0 Output Value
	CTRLC_HCMP0OV_Msk    = 0x10 // High Compare 0 Output Value
	CTRLC_HCMP1OV        = 0x20 // High Compare 1 Output Value
	CTRLC_HCMP1OV_Msk    = 0x20 // High Compare 1 Output Value
	CTRLC_HCMP2OV        = 0x40 // High Compare 2 Output Value
	CTRLC_HCMP2OV_Msk    = 0x40 // High Compare 2 Output Value
	CTRLC_LCMP0OV        = 0x1  // Low Compare 0 Output Value
	CTRLC_LCMP0OV_Msk    = 0x1  // Low Compare 0 Output Value
	CTRLC_LCMP1OV        = 0x2  // Low Compare 1 Output Value
	CTRLC_LCMP1OV_Msk    = 0x2  // Low Compare 1 Output Value
	CTRLC_LCMP2OV        = 0x4  // Low Compare 2 Output Value
	CTRLC_LCMP2OV_Msk    = 0x4  // Low Compare 2 Output Value
	CTRLC_AUPDATE        = 0x2  // Auto update
	CTRLC_AUPDATE_Msk    = 0x2  // Auto update
	CTRLC_CMPCSEL        = 0x40 // Compare C output select
	CTRLC_CMPCSEL_Msk    = 0x40 // Compare C output select
	CTRLC_CMPDSEL        = 0x80 // Compare D output select
	CTRLC_CMPDSEL_Msk    = 0x80 // Compare D output select
	CTRLC_CMPOVR         = 0x1  // Compare output value override
	CTRLC_CMPOVR_Msk     = 0x1  // Compare output value override
	CTRLC_FIFTY          = 0x8  // Fifty percent waveform
	CTRLC_FIFTY_Msk      = 0x8  // Fifty percent waveform
	CTRLC_ADC1REFSEL0    = 0x10 // ADC1 reference select
	CTRLC_ADC1REFSEL1    = 0x20 // ADC1 reference select
	CTRLC_ADC1REFSEL2    = 0x40 // ADC1 reference select
	CTRLC_ADC1REFSEL_Msk = 0x70 // ADC1 reference select
	CTRLC_DAC1REFSEL0    = 0x1  // DAC1/AC1 reference select
	CTRLC_DAC1REFSEL1    = 0x2  // DAC1/AC1 reference select
	CTRLC_DAC1REFSEL2    = 0x4  // DAC1/AC1 reference select
	CTRLC_DAC1REFSEL_Msk = 0x7  // DAC1/AC1 reference select

	// CTRLD: Control D
	CTRLD_ASDV           = 0x10 // Automatic Sampling Delay Variation
	CTRLD_ASDV_Msk       = 0x10 // Automatic Sampling Delay Variation
	CTRLD_INITDLY0       = 0x20 // Initial Delay Selection
	CTRLD_INITDLY1       = 0x40 // Initial Delay Selection
	CTRLD_INITDLY2       = 0x80 // Initial Delay Selection
	CTRLD_INITDLY_Msk    = 0xe0 // Initial Delay Selection
	CTRLD_SAMPDLY0       = 0x1  // Sampling Delay Selection
	CTRLD_SAMPDLY1       = 0x2  // Sampling Delay Selection
	CTRLD_SAMPDLY2       = 0x4  // Sampling Delay Selection
	CTRLD_SAMPDLY3       = 0x8  // Sampling Delay Selection
	CTRLD_SAMPDLY_Msk    = 0xf  // Sampling Delay Selection
	CTRLD_TCB0           = 0x1  // Port Multiplexer TCB
	CTRLD_TCB0_Msk       = 0x1  // Port Multiplexer TCB
	CTRLD_SPLITM         = 0x1  // Split Mode Enable
	CTRLD_SPLITM_Msk     = 0x1  // Split Mode Enable
	CTRLD_CMPAVAL0       = 0x1  // Compare A value
	CTRLD_CMPAVAL1       = 0x2  // Compare A value
	CTRLD_CMPAVAL2       = 0x4  // Compare A value
	CTRLD_CMPAVAL3       = 0x8  // Compare A value
	CTRLD_CMPAVAL_Msk    = 0xf  // Compare A value
	CTRLD_CMPBVAL0       = 0x10 // Compare B value
	CTRLD_CMPBVAL1       = 0x20 // Compare B value
	CTRLD_CMPBVAL2       = 0x40 // Compare B value
	CTRLD_CMPBVAL3       = 0x80 // Compare B value
	CTRLD_CMPBVAL_Msk    = 0xf0 // Compare B value
	CTRLD_DAC2REFSEL0    = 0x1  // DAC2/AC2 reference select
	CTRLD_DAC2REFSEL1    = 0x2  // DAC2/AC2 reference select
	CTRLD_DAC2REFSEL2    = 0x4  // DAC2/AC2 reference select
	CTRLD_DAC2REFSEL_Msk = 0x7  // DAC2/AC2 reference select

	// CTRLE: Control E
	CTRLE_WINCM0        = 0x1  // Window Comparator Mode
	CTRLE_WINCM1        = 0x2  // Window Comparator Mode
	CTRLE_WINCM2        = 0x4  // Window Comparator Mode
	CTRLE_WINCM_Msk     = 0x7  // Window Comparator Mode
	CTRLE_DISEOC        = 0x80 // Disable at end of cycle
	CTRLE_DISEOC_Msk    = 0x80 // Disable at end of cycle
	CTRLE_RESTART       = 0x4  // Restart strobe
	CTRLE_RESTART_Msk   = 0x4  // Restart strobe
	CTRLE_SCAPTUREA     = 0x8  // Software Capture A Strobe
	CTRLE_SCAPTUREA_Msk = 0x8  // Software Capture A Strobe
	CTRLE_SCAPTUREB     = 0x10 // Software Capture B Strobe
	CTRLE_SCAPTUREB_Msk = 0x10 // Software Capture B Strobe
	CTRLE_SYNC          = 0x2  // synchronize strobe
	CTRLE_SYNC_Msk      = 0x2  // synchronize strobe
	CTRLE_SYNCEOC       = 0x1  // synchronize end of cycle strobe
	CTRLE_SYNCEOC_Msk   = 0x1  // synchronize end of cycle strobe

	// DBGCTRL: Debug Control
	DBGCTRL_DBGRUN       = 0x1  // Debug run
	DBGCTRL_DBGRUN_Msk   = 0x1  // Debug run
	DBGCTRL_FAULTDET     = 0x4  // Fault detection
	DBGCTRL_FAULTDET_Msk = 0x4  // Fault detection
	DBGCTRL_ABMBP        = 0x80 // Autobaud majority voter bypass
	DBGCTRL_ABMBP_Msk    = 0x80 // Autobaud majority voter bypass

	// EVCTRL: Event Control
	EVCTRL_STARTEI     = 0x1  // Start Event Input Enable
	EVCTRL_STARTEI_Msk = 0x1  // Start Event Input Enable
	EVCTRL_CNTEI       = 0x1  // Count on Event Input
	EVCTRL_CNTEI_Msk   = 0x1  // Count on Event Input
	EVCTRL_EVACT0      = 0x2  // Event Action
	EVCTRL_EVACT1      = 0x4  // Event Action
	EVCTRL_EVACT_Msk   = 0x6  // Event Action
	EVCTRL_CAPTEI      = 0x1  // Event Input Enable
	EVCTRL_CAPTEI_Msk  = 0x1  // Event Input Enable
	EVCTRL_EDGE        = 0x10 // Event Edge
	EVCTRL_EDGE_Msk    = 0x10 // Event Edge
	EVCTRL_FILTER      = 0x40 // Input Capture Noise Cancellation Filter
	EVCTRL_FILTER_Msk  = 0x40 // Input Capture Noise Cancellation Filter
	EVCTRL_IREI        = 0x1  // IrDA Event Input Enable
	EVCTRL_IREI_Msk    = 0x1  // IrDA Event Input Enable

	// INTFLAGS: Interrupt Flags
	INTFLAGS_RESRDY      = 0x1  // Result Ready Flag
	INTFLAGS_RESRDY_Msk  = 0x1  // Result Ready Flag
	INTFLAGS_WCMP        = 0x2  // Window Comparator Flag
	INTFLAGS_WCMP_Msk    = 0x2  // Window Comparator Flag
	INTFLAGS_VLMIF       = 0x1  // Voltage level monitor interrupt flag
	INTFLAGS_VLMIF_Msk   = 0x1  // Voltage level monitor interrupt flag
	INTFLAGS_EEREADY     = 0x1  // EEPROM Ready
	INTFLAGS_EEREADY_Msk = 0x1  // EEPROM Ready
	INTFLAGS_INT0        = 0x1  // Pin Interrupt
	INTFLAGS_INT1        = 0x2  // Pin Interrupt
	INTFLAGS_INT2        = 0x4  // Pin Interrupt
	INTFLAGS_INT3        = 0x8  // Pin Interrupt
	INTFLAGS_INT4        = 0x10 // Pin Interrupt
	INTFLAGS_INT5        = 0x20 // Pin Interrupt
	INTFLAGS_INT6        = 0x40 // Pin Interrupt
	INTFLAGS_INT7        = 0x80 // Pin Interrupt
	INTFLAGS_INT_Msk     = 0xff // Pin Interrupt
	INTFLAGS_CMP         = 0x2  // Compare Match Interrupt
	INTFLAGS_CMP_Msk     = 0x2  // Compare Match Interrupt
	INTFLAGS_OVF         = 0x1  // Overflow Interrupt Flag
	INTFLAGS_OVF_Msk     = 0x1  // Overflow Interrupt Flag
	INTFLAGS_CMP0        = 0x10 // Compare 0 Interrupt
	INTFLAGS_CMP0_Msk    = 0x10 // Compare 0 Interrupt
	INTFLAGS_CMP1        = 0x20 // Compare 1 Interrupt
	INTFLAGS_CMP1_Msk    = 0x20 // Compare 1 Interrupt
	INTFLAGS_CMP2        = 0x40 // Compare 2 Interrupt
	INTFLAGS_CMP2_Msk    = 0x40 // Compare 2 Interrupt
	INTFLAGS_HUNF        = 0x2  // High Underflow Interrupt Flag
	INTFLAGS_HUNF_Msk    = 0x2  // High Underflow Interrupt Flag
	INTFLAGS_LCMP0       = 0x10 // Low Compare 2 Interrupt Flag
	INTFLAGS_LCMP0_Msk   = 0x10 // Low Compare 2 Interrupt Flag
	INTFLAGS_LCMP1       = 0x20 // Low Compare 1 Interrupt Flag
	INTFLAGS_LCMP1_Msk   = 0x20 // Low Compare 1 Interrupt Flag
	INTFLAGS_LCMP2       = 0x40 // Low Compare 0 Interrupt Flag
	INTFLAGS_LCMP2_Msk   = 0x40 // Low Compare 0 Interrupt Flag
	INTFLAGS_LUNF        = 0x1  // Low Underflow Interrupt Flag
	INTFLAGS_LUNF_Msk    = 0x1  // Low Underflow Interrupt Flag
	INTFLAGS_CAPT        = 0x1  // Capture or Timeout
	INTFLAGS_CAPT_Msk    = 0x1  // Capture or Timeout
	INTFLAGS_TRIGA       = 0x4  // Trigger A interrupt enable
	INTFLAGS_TRIGA_Msk   = 0x4  // Trigger A interrupt enable
	INTFLAGS_TRIGB       = 0x8  // Trigger B interrupt enable
	INTFLAGS_TRIGB_Msk   = 0x8  // Trigger B interrupt enable

	// MUXPOS: Positive mux input
	MUXPOS_MUXPOS0    = 0x1  // Analog Channel Selection Bits
	MUXPOS_MUXPOS1    = 0x2  // Analog Channel Selection Bits
	MUXPOS_MUXPOS2    = 0x4  // Analog Channel Selection Bits
	MUXPOS_MUXPOS3    = 0x8  // Analog Channel Selection Bits
	MUXPOS_MUXPOS4    = 0x10 // Analog Channel Selection Bits
	MUXPOS_MUXPOS_Msk = 0x1f // Analog Channel Selection Bits

	// SAMPCTRL: Sample Control
	SAMPCTRL_SAMPLEN0    = 0x1  // Sample lenght
	SAMPCTRL_SAMPLEN1    = 0x2  // Sample lenght
	SAMPCTRL_SAMPLEN2    = 0x4  // Sample lenght
	SAMPCTRL_SAMPLEN3    = 0x8  // Sample lenght
	SAMPCTRL_SAMPLEN4    = 0x10 // Sample lenght
	SAMPCTRL_SAMPLEN_Msk = 0x1f // Sample lenght

	// TEMP: Temporary Data
	TEMP_TEMP0    = 0x1  // Temporary
	TEMP_TEMP1    = 0x2  // Temporary
	TEMP_TEMP2    = 0x4  // Temporary
	TEMP_TEMP3    = 0x8  // Temporary
	TEMP_TEMP4    = 0x10 // Temporary
	TEMP_TEMP5    = 0x20 // Temporary
	TEMP_TEMP6    = 0x40 // Temporary
	TEMP_TEMP7    = 0x80 // Temporary
	TEMP_TEMP_Msk = 0xff // Temporary
)

// Bitfields for BOD: Bod interface
const (
	// VLMCTRLA: Voltage level monitor Control
	VLMCTRLA_VLMLVL0    = 0x1 // voltage level monitor level
	VLMCTRLA_VLMLVL1    = 0x2 // voltage level monitor level
	VLMCTRLA_VLMLVL_Msk = 0x3 // voltage level monitor level
)

// Bitfields for CCL: Configurable Custom Logic
const (
	// LUT0CTRLA: LUT Control 0 A
	LUT0CTRLA_CLKSRC      = 0x40 // Clock Source Selection
	LUT0CTRLA_CLKSRC_Msk  = 0x40 // Clock Source Selection
	LUT0CTRLA_EDGEDET     = 0x80 // Edge Detection Enable
	LUT0CTRLA_EDGEDET_Msk = 0x80 // Edge Detection Enable
	LUT0CTRLA_ENABLE      = 0x1  // LUT Enable
	LUT0CTRLA_ENABLE_Msk  = 0x1  // LUT Enable
	LUT0CTRLA_FILTSEL0    = 0x10 // Filter Selection
	LUT0CTRLA_FILTSEL1    = 0x20 // Filter Selection
	LUT0CTRLA_FILTSEL_Msk = 0x30 // Filter Selection
	LUT0CTRLA_OUTEN       = 0x8  // Output Enable
	LUT0CTRLA_OUTEN_Msk   = 0x8  // Output Enable

	// LUT0CTRLB: LUT Control 0 B
	LUT0CTRLB_INSEL00    = 0x1  // LUT Input 0 Source Selection
	LUT0CTRLB_INSEL01    = 0x2  // LUT Input 0 Source Selection
	LUT0CTRLB_INSEL02    = 0x4  // LUT Input 0 Source Selection
	LUT0CTRLB_INSEL03    = 0x8  // LUT Input 0 Source Selection
	LUT0CTRLB_INSEL0_Msk = 0xf  // LUT Input 0 Source Selection
	LUT0CTRLB_INSEL10    = 0x10 // LUT Input 1 Source Selection
	LUT0CTRLB_INSEL11    = 0x20 // LUT Input 1 Source Selection
	LUT0CTRLB_INSEL12    = 0x40 // LUT Input 1 Source Selection
	LUT0CTRLB_INSEL13    = 0x80 // LUT Input 1 Source Selection
	LUT0CTRLB_INSEL1_Msk = 0xf0 // LUT Input 1 Source Selection

	// LUT0CTRLC: LUT Control 0 C
	LUT0CTRLC_INSEL20    = 0x1 // LUT Input 2 Source Selection
	LUT0CTRLC_INSEL21    = 0x2 // LUT Input 2 Source Selection
	LUT0CTRLC_INSEL22    = 0x4 // LUT Input 2 Source Selection
	LUT0CTRLC_INSEL23    = 0x8 // LUT Input 2 Source Selection
	LUT0CTRLC_INSEL2_Msk = 0xf // LUT Input 2 Source Selection

	// LUT1CTRLA: LUT Control 1 A
	LUT1CTRLA_CLKSRC      = 0x40 // Clock Source Selection
	LUT1CTRLA_CLKSRC_Msk  = 0x40 // Clock Source Selection
	LUT1CTRLA_EDGEDET     = 0x80 // Edge Detection Enable
	LUT1CTRLA_EDGEDET_Msk = 0x80 // Edge Detection Enable
	LUT1CTRLA_ENABLE      = 0x1  // LUT Enable
	LUT1CTRLA_ENABLE_Msk  = 0x1  // LUT Enable
	LUT1CTRLA_FILTSEL0    = 0x10 // Filter Selection
	LUT1CTRLA_FILTSEL1    = 0x20 // Filter Selection
	LUT1CTRLA_FILTSEL_Msk = 0x30 // Filter Selection
	LUT1CTRLA_OUTEN       = 0x8  // Output Enable
	LUT1CTRLA_OUTEN_Msk   = 0x8  // Output Enable

	// LUT1CTRLB: LUT Control 1 B
	LUT1CTRLB_INSEL00    = 0x1  // LUT Input 0 Source Selection
	LUT1CTRLB_INSEL01    = 0x2  // LUT Input 0 Source Selection
	LUT1CTRLB_INSEL02    = 0x4  // LUT Input 0 Source Selection
	LUT1CTRLB_INSEL03    = 0x8  // LUT Input 0 Source Selection
	LUT1CTRLB_INSEL0_Msk = 0xf  // LUT Input 0 Source Selection
	LUT1CTRLB_INSEL10    = 0x10 // LUT Input 1 Source Selection
	LUT1CTRLB_INSEL11    = 0x20 // LUT Input 1 Source Selection
	LUT1CTRLB_INSEL12    = 0x40 // LUT Input 1 Source Selection
	LUT1CTRLB_INSEL13    = 0x80 // LUT Input 1 Source Selection
	LUT1CTRLB_INSEL1_Msk = 0xf0 // LUT Input 1 Source Selection

	// LUT1CTRLC: LUT Control 1 C
	LUT1CTRLC_INSEL20    = 0x1 // LUT Input 2 Source Selection
	LUT1CTRLC_INSEL21    = 0x2 // LUT Input 2 Source Selection
	LUT1CTRLC_INSEL22    = 0x4 // LUT Input 2 Source Selection
	LUT1CTRLC_INSEL23    = 0x8 // LUT Input 2 Source Selection
	LUT1CTRLC_INSEL2_Msk = 0xf // LUT Input 2 Source Selection

	// SEQCTRL0: Sequential Control 0
	SEQCTRL0_SEQSEL0    = 0x1 // Sequential Selection
	SEQCTRL0_SEQSEL1    = 0x2 // Sequential Selection
	SEQCTRL0_SEQSEL2    = 0x4 // Sequential Selection
	SEQCTRL0_SEQSEL_Msk = 0x7 // Sequential Selection
)

// Bitfields for CLKCTRL: Clock controller
const (
	// MCLKCTRLA: MCLK Control A
	MCLKCTRLA_CLKOUT     = 0x80 // System clock out
	MCLKCTRLA_CLKOUT_Msk = 0x80 // System clock out
	MCLKCTRLA_CLKSEL0    = 0x1  // clock select
	MCLKCTRLA_CLKSEL1    = 0x2  // clock select
	MCLKCTRLA_CLKSEL_Msk = 0x3  // clock select

	// MCLKCTRLB: MCLK Control B
	MCLKCTRLB_PDIV0    = 0x2  // Prescaler division
	MCLKCTRLB_PDIV1    = 0x4  // Prescaler division
	MCLKCTRLB_PDIV2    = 0x8  // Prescaler division
	MCLKCTRLB_PDIV3    = 0x10 // Prescaler division
	MCLKCTRLB_PDIV_Msk = 0x1e // Prescaler division
	MCLKCTRLB_PEN      = 0x1  // Prescaler enable
	MCLKCTRLB_PEN_Msk  = 0x1  // Prescaler enable

	// MCLKLOCK: MCLK Lock
	MCLKLOCK_LOCKEN     = 0x1 // lock ebable
	MCLKLOCK_LOCKEN_Msk = 0x1 // lock ebable

	// MCLKSTATUS: MCLK Status
	MCLKSTATUS_EXTS         = 0x80 // External Clock status
	MCLKSTATUS_EXTS_Msk     = 0x80 // External Clock status
	MCLKSTATUS_OSC20MS      = 0x10 // 20MHz oscillator status
	MCLKSTATUS_OSC20MS_Msk  = 0x10 // 20MHz oscillator status
	MCLKSTATUS_OSC32KS      = 0x20 // 32KHz oscillator status
	MCLKSTATUS_OSC32KS_Msk  = 0x20 // 32KHz oscillator status
	MCLKSTATUS_SOSC         = 0x1  // System Oscillator changing
	MCLKSTATUS_SOSC_Msk     = 0x1  // System Oscillator changing
	MCLKSTATUS_XOSC32KS     = 0x40 // 32.768 kHz Crystal Oscillator status
	MCLKSTATUS_XOSC32KS_Msk = 0x40 // 32.768 kHz Crystal Oscillator status

	// OSC20MCALIBA: OSC20M Calibration A
	OSC20MCALIBA_CALSEL20M0    = 0x40 // Calibration freq select
	OSC20MCALIBA_CALSEL20M1    = 0x80 // Calibration freq select
	OSC20MCALIBA_CALSEL20M_Msk = 0xc0 // Calibration freq select
	OSC20MCALIBA_CAL20M0       = 0x1  // Calibration
	OSC20MCALIBA_CAL20M1       = 0x2  // Calibration
	OSC20MCALIBA_CAL20M2       = 0x4  // Calibration
	OSC20MCALIBA_CAL20M3       = 0x8  // Calibration
	OSC20MCALIBA_CAL20M4       = 0x10 // Calibration
	OSC20MCALIBA_CAL20M5       = 0x20 // Calibration
	OSC20MCALIBA_CAL20M_Msk    = 0x3f // Calibration

	// OSC20MCALIBB: OSC20M Calibration B
	OSC20MCALIBB_LOCK           = 0x80 // Lock
	OSC20MCALIBB_LOCK_Msk       = 0x80 // Lock
	OSC20MCALIBB_TEMPCAL20M0    = 0x1  // Oscillator temperature coefficient
	OSC20MCALIBB_TEMPCAL20M1    = 0x2  // Oscillator temperature coefficient
	OSC20MCALIBB_TEMPCAL20M2    = 0x4  // Oscillator temperature coefficient
	OSC20MCALIBB_TEMPCAL20M3    = 0x8  // Oscillator temperature coefficient
	OSC20MCALIBB_TEMPCAL20M_Msk = 0xf  // Oscillator temperature coefficient

	// OSC20MCTRLA: OSC20M Control A
	OSC20MCTRLA_RUNSTDBY     = 0x2 // Run standby
	OSC20MCTRLA_RUNSTDBY_Msk = 0x2 // Run standby

	// OSC32KCTRLA: OSC32K Control A
	OSC32KCTRLA_RUNSTDBY     = 0x2 // Run standby
	OSC32KCTRLA_RUNSTDBY_Msk = 0x2 // Run standby

	// XOSC32KCTRLA: XOSC32K Control A
	XOSC32KCTRLA_CSUT0        = 0x10 // Crystal startup time
	XOSC32KCTRLA_CSUT1        = 0x20 // Crystal startup time
	XOSC32KCTRLA_CSUT_Msk     = 0x30 // Crystal startup time
	XOSC32KCTRLA_ENABLE       = 0x1  // Enable
	XOSC32KCTRLA_ENABLE_Msk   = 0x1  // Enable
	XOSC32KCTRLA_RUNSTDBY     = 0x2  // Run standby
	XOSC32KCTRLA_RUNSTDBY_Msk = 0x2  // Run standby
	XOSC32KCTRLA_SEL          = 0x4  // Select
	XOSC32KCTRLA_SEL_Msk      = 0x4  // Select
)

// Bitfields for CPU: CPU
const (
	// CCP: Configuration Change Protection
	CCP_CCP0    = 0x1  // CCP signature
	CCP_CCP1    = 0x2  // CCP signature
	CCP_CCP2    = 0x4  // CCP signature
	CCP_CCP3    = 0x8  // CCP signature
	CCP_CCP4    = 0x10 // CCP signature
	CCP_CCP5    = 0x20 // CCP signature
	CCP_CCP6    = 0x40 // CCP signature
	CCP_CCP7    = 0x80 // CCP signature
	CCP_CCP_Msk = 0xff // CCP signature

	// SREG: Status Register
	SREG_C     = 0x1  // Carry Flag
	SREG_C_Msk = 0x1  // Carry Flag
	SREG_H     = 0x20 // Half Carry Flag
	SREG_H_Msk = 0x20 // Half Carry Flag
	SREG_I     = 0x80 // Global Interrupt Enable Flag
	SREG_I_Msk = 0x80 // Global Interrupt Enable Flag
	SREG_N     = 0x4  // Negative Flag
	SREG_N_Msk = 0x4  // Negative Flag
	SREG_S     = 0x10 // N Exclusive Or V Flag
	SREG_S_Msk = 0x10 // N Exclusive Or V Flag
	SREG_T     = 0x40 // Transfer Bit
	SREG_T_Msk = 0x40 // Transfer Bit
	SREG_V     = 0x8  // Two's Complement Overflow Flag
	SREG_V_Msk = 0x8  // Two's Complement Overflow Flag
	SREG_Z     = 0x2  // Zero Flag
	SREG_Z_Msk = 0x2  // Zero Flag
)

// Bitfields for CPUINT: Interrupt Controller
const (
	// LVL0PRI: Interrupt Level 0 Priority
	LVL0PRI_LVL0PRI0    = 0x1  // Interrupt Level Priority
	LVL0PRI_LVL0PRI1    = 0x2  // Interrupt Level Priority
	LVL0PRI_LVL0PRI2    = 0x4  // Interrupt Level Priority
	LVL0PRI_LVL0PRI3    = 0x8  // Interrupt Level Priority
	LVL0PRI_LVL0PRI4    = 0x10 // Interrupt Level Priority
	LVL0PRI_LVL0PRI5    = 0x20 // Interrupt Level Priority
	LVL0PRI_LVL0PRI6    = 0x40 // Interrupt Level Priority
	LVL0PRI_LVL0PRI7    = 0x80 // Interrupt Level Priority
	LVL0PRI_LVL0PRI_Msk = 0xff // Interrupt Level Priority

	// LVL1VEC: Interrupt Level 1 Priority Vector
	LVL1VEC_LVL1VEC0    = 0x1  // Interrupt Vector with High Priority
	LVL1VEC_LVL1VEC1    = 0x2  // Interrupt Vector with High Priority
	LVL1VEC_LVL1VEC2    = 0x4  // Interrupt Vector with High Priority
	LVL1VEC_LVL1VEC3    = 0x8  // Interrupt Vector with High Priority
	LVL1VEC_LVL1VEC4    = 0x10 // Interrupt Vector with High Priority
	LVL1VEC_LVL1VEC5    = 0x20 // Interrupt Vector with High Priority
	LVL1VEC_LVL1VEC6    = 0x40 // Interrupt Vector with High Priority
	LVL1VEC_LVL1VEC7    = 0x80 // Interrupt Vector with High Priority
	LVL1VEC_LVL1VEC_Msk = 0xff // Interrupt Vector with High Priority
)

// Bitfields for EVSYS: Event System
const (
	// ASYNCCH0: Asynchronous Channel 0 Generator Selection
	ASYNCCH0_ASYNCCH00    = 0x1  // Asynchronous Channel 0 Generator Selection
	ASYNCCH0_ASYNCCH01    = 0x2  // Asynchronous Channel 0 Generator Selection
	ASYNCCH0_ASYNCCH02    = 0x4  // Asynchronous Channel 0 Generator Selection
	ASYNCCH0_ASYNCCH03    = 0x8  // Asynchronous Channel 0 Generator Selection
	ASYNCCH0_ASYNCCH04    = 0x10 // Asynchronous Channel 0 Generator Selection
	ASYNCCH0_ASYNCCH05    = 0x20 // Asynchronous Channel 0 Generator Selection
	ASYNCCH0_ASYNCCH06    = 0x40 // Asynchronous Channel 0 Generator Selection
	ASYNCCH0_ASYNCCH07    = 0x80 // Asynchronous Channel 0 Generator Selection
	ASYNCCH0_ASYNCCH0_Msk = 0xff // Asynchronous Channel 0 Generator Selection

	// ASYNCCH1: Asynchronous Channel 1 Generator Selection
	ASYNCCH1_ASYNCCH10    = 0x1  // Asynchronous Channel 1 Generator Selection
	ASYNCCH1_ASYNCCH11    = 0x2  // Asynchronous Channel 1 Generator Selection
	ASYNCCH1_ASYNCCH12    = 0x4  // Asynchronous Channel 1 Generator Selection
	ASYNCCH1_ASYNCCH13    = 0x8  // Asynchronous Channel 1 Generator Selection
	ASYNCCH1_ASYNCCH14    = 0x10 // Asynchronous Channel 1 Generator Selection
	ASYNCCH1_ASYNCCH15    = 0x20 // Asynchronous Channel 1 Generator Selection
	ASYNCCH1_ASYNCCH16    = 0x40 // Asynchronous Channel 1 Generator Selection
	ASYNCCH1_ASYNCCH17    = 0x80 // Asynchronous Channel 1 Generator Selection
	ASYNCCH1_ASYNCCH1_Msk = 0xff // Asynchronous Channel 1 Generator Selection

	// ASYNCCH2: Asynchronous Channel 2 Generator Selection
	ASYNCCH2_ASYNCCH20    = 0x1  // Asynchronous Channel 2 Generator Selection
	ASYNCCH2_ASYNCCH21    = 0x2  // Asynchronous Channel 2 Generator Selection
	ASYNCCH2_ASYNCCH22    = 0x4  // Asynchronous Channel 2 Generator Selection
	ASYNCCH2_ASYNCCH23    = 0x8  // Asynchronous Channel 2 Generator Selection
	ASYNCCH2_ASYNCCH24    = 0x10 // Asynchronous Channel 2 Generator Selection
	ASYNCCH2_ASYNCCH25    = 0x20 // Asynchronous Channel 2 Generator Selection
	ASYNCCH2_ASYNCCH26    = 0x40 // Asynchronous Channel 2 Generator Selection
	ASYNCCH2_ASYNCCH27    = 0x80 // Asynchronous Channel 2 Generator Selection
	ASYNCCH2_ASYNCCH2_Msk = 0xff // Asynchronous Channel 2 Generator Selection

	// ASYNCCH3: Asynchronous Channel 3 Generator Selection
	ASYNCCH3_ASYNCCH30    = 0x1  // Asynchronous Channel 3 Generator Selection
	ASYNCCH3_ASYNCCH31    = 0x2  // Asynchronous Channel 3 Generator Selection
	ASYNCCH3_ASYNCCH32    = 0x4  // Asynchronous Channel 3 Generator Selection
	ASYNCCH3_ASYNCCH33    = 0x8  // Asynchronous Channel 3 Generator Selection
	ASYNCCH3_ASYNCCH34    = 0x10 // Asynchronous Channel 3 Generator Selection
	ASYNCCH3_ASYNCCH35    = 0x20 // Asynchronous Channel 3 Generator Selection
	ASYNCCH3_ASYNCCH36    = 0x40 // Asynchronous Channel 3 Generator Selection
	ASYNCCH3_ASYNCCH37    = 0x80 // Asynchronous Channel 3 Generator Selection
	ASYNCCH3_ASYNCCH3_Msk = 0xff // Asynchronous Channel 3 Generator Selection

	// ASYNCUSER0: Asynchronous User Ch 0 Input Selection - TCB0
	ASYNCUSER0_ASYNCUSER00    = 0x1  // Asynchronous User Ch 0 Input Selection - TCB0
	ASYNCUSER0_ASYNCUSER01    = 0x2  // Asynchronous User Ch 0 Input Selection - TCB0
	ASYNCUSER0_ASYNCUSER02    = 0x4  // Asynchronous User Ch 0 Input Selection - TCB0
	ASYNCUSER0_ASYNCUSER03    = 0x8  // Asynchronous User Ch 0 Input Selection - TCB0
	ASYNCUSER0_ASYNCUSER04    = 0x10 // Asynchronous User Ch 0 Input Selection - TCB0
	ASYNCUSER0_ASYNCUSER05    = 0x20 // Asynchronous User Ch 0 Input Selection - TCB0
	ASYNCUSER0_ASYNCUSER06    = 0x40 // Asynchronous User Ch 0 Input Selection - TCB0
	ASYNCUSER0_ASYNCUSER07    = 0x80 // Asynchronous User Ch 0 Input Selection - TCB0
	ASYNCUSER0_ASYNCUSER0_Msk = 0xff // Asynchronous User Ch 0 Input Selection - TCB0

	// ASYNCUSER1: Asynchronous User Ch 1 Input Selection - ADC0
	ASYNCUSER1_ASYNCUSER10    = 0x1  // Asynchronous User Ch 1 Input Selection - ADC0
	ASYNCUSER1_ASYNCUSER11    = 0x2  // Asynchronous User Ch 1 Input Selection - ADC0
	ASYNCUSER1_ASYNCUSER12    = 0x4  // Asynchronous User Ch 1 Input Selection - ADC0
	ASYNCUSER1_ASYNCUSER13    = 0x8  // Asynchronous User Ch 1 Input Selection - ADC0
	ASYNCUSER1_ASYNCUSER14    = 0x10 // Asynchronous User Ch 1 Input Selection - ADC0
	ASYNCUSER1_ASYNCUSER15    = 0x20 // Asynchronous User Ch 1 Input Selection - ADC0
	ASYNCUSER1_ASYNCUSER16    = 0x40 // Asynchronous User Ch 1 Input Selection - ADC0
	ASYNCUSER1_ASYNCUSER17    = 0x80 // Asynchronous User Ch 1 Input Selection - ADC0
	ASYNCUSER1_ASYNCUSER1_Msk = 0xff // Asynchronous User Ch 1 Input Selection - ADC0

	// ASYNCUSER2: Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0
	ASYNCUSER2_ASYNCUSER20    = 0x1  // Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0
	ASYNCUSER2_ASYNCUSER21    = 0x2  // Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0
	ASYNCUSER2_ASYNCUSER22    = 0x4  // Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0
	ASYNCUSER2_ASYNCUSER23    = 0x8  // Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0
	ASYNCUSER2_ASYNCUSER24    = 0x10 // Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0
	ASYNCUSER2_ASYNCUSER25    = 0x20 // Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0
	ASYNCUSER2_ASYNCUSER26    = 0x40 // Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0
	ASYNCUSER2_ASYNCUSER27    = 0x80 // Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0
	ASYNCUSER2_ASYNCUSER2_Msk = 0xff // Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0

	// ASYNCUSER3: Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0
	ASYNCUSER3_ASYNCUSER30    = 0x1  // Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0
	ASYNCUSER3_ASYNCUSER31    = 0x2  // Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0
	ASYNCUSER3_ASYNCUSER32    = 0x4  // Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0
	ASYNCUSER3_ASYNCUSER33    = 0x8  // Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0
	ASYNCUSER3_ASYNCUSER34    = 0x10 // Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0
	ASYNCUSER3_ASYNCUSER35    = 0x20 // Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0
	ASYNCUSER3_ASYNCUSER36    = 0x40 // Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0
	ASYNCUSER3_ASYNCUSER37    = 0x80 // Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0
	ASYNCUSER3_ASYNCUSER3_Msk = 0xff // Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0

	// ASYNCUSER4: Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1
	ASYNCUSER4_ASYNCUSER40    = 0x1  // Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1
	ASYNCUSER4_ASYNCUSER41    = 0x2  // Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1
	ASYNCUSER4_ASYNCUSER42    = 0x4  // Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1
	ASYNCUSER4_ASYNCUSER43    = 0x8  // Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1
	ASYNCUSER4_ASYNCUSER44    = 0x10 // Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1
	ASYNCUSER4_ASYNCUSER45    = 0x20 // Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1
	ASYNCUSER4_ASYNCUSER46    = 0x40 // Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1
	ASYNCUSER4_ASYNCUSER47    = 0x80 // Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1
	ASYNCUSER4_ASYNCUSER4_Msk = 0xff // Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1

	// ASYNCUSER5: Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1
	ASYNCUSER5_ASYNCUSER50    = 0x1  // Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1
	ASYNCUSER5_ASYNCUSER51    = 0x2  // Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1
	ASYNCUSER5_ASYNCUSER52    = 0x4  // Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1
	ASYNCUSER5_ASYNCUSER53    = 0x8  // Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1
	ASYNCUSER5_ASYNCUSER54    = 0x10 // Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1
	ASYNCUSER5_ASYNCUSER55    = 0x20 // Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1
	ASYNCUSER5_ASYNCUSER56    = 0x40 // Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1
	ASYNCUSER5_ASYNCUSER57    = 0x80 // Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1
	ASYNCUSER5_ASYNCUSER5_Msk = 0xff // Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1

	// ASYNCUSER6: Asynchronous User Ch 6 Input Selection - TCD0 Event 0
	ASYNCUSER6_ASYNCUSER60    = 0x1  // Asynchronous User Ch 6 Input Selection - TCD0 Event 0
	ASYNCUSER6_ASYNCUSER61    = 0x2  // Asynchronous User Ch 6 Input Selection - TCD0 Event 0
	ASYNCUSER6_ASYNCUSER62    = 0x4  // Asynchronous User Ch 6 Input Selection - TCD0 Event 0
	ASYNCUSER6_ASYNCUSER63    = 0x8  // Asynchronous User Ch 6 Input Selection - TCD0 Event 0
	ASYNCUSER6_ASYNCUSER64    = 0x10 // Asynchronous User Ch 6 Input Selection - TCD0 Event 0
	ASYNCUSER6_ASYNCUSER65    = 0x20 // Asynchronous User Ch 6 Input Selection - TCD0 Event 0
	ASYNCUSER6_ASYNCUSER66    = 0x40 // Asynchronous User Ch 6 Input Selection - TCD0 Event 0
	ASYNCUSER6_ASYNCUSER67    = 0x80 // Asynchronous User Ch 6 Input Selection - TCD0 Event 0
	ASYNCUSER6_ASYNCUSER6_Msk = 0xff // Asynchronous User Ch 6 Input Selection - TCD0 Event 0

	// ASYNCUSER7: Asynchronous User Ch 7 Input Selection - TCD0 Event 1
	ASYNCUSER7_ASYNCUSER70    = 0x1  // Asynchronous User Ch 7 Input Selection - TCD0 Event 1
	ASYNCUSER7_ASYNCUSER71    = 0x2  // Asynchronous User Ch 7 Input Selection - TCD0 Event 1
	ASYNCUSER7_ASYNCUSER72    = 0x4  // Asynchronous User Ch 7 Input Selection - TCD0 Event 1
	ASYNCUSER7_ASYNCUSER73    = 0x8  // Asynchronous User Ch 7 Input Selection - TCD0 Event 1
	ASYNCUSER7_ASYNCUSER74    = 0x10 // Asynchronous User Ch 7 Input Selection - TCD0 Event 1
	ASYNCUSER7_ASYNCUSER75    = 0x20 // Asynchronous User Ch 7 Input Selection - TCD0 Event 1
	ASYNCUSER7_ASYNCUSER76    = 0x40 // Asynchronous User Ch 7 Input Selection - TCD0 Event 1
	ASYNCUSER7_ASYNCUSER77    = 0x80 // Asynchronous User Ch 7 Input Selection - TCD0 Event 1
	ASYNCUSER7_ASYNCUSER7_Msk = 0xff // Asynchronous User Ch 7 Input Selection - TCD0 Event 1

	// ASYNCUSER8: Asynchronous User Ch 8 Input Selection - Event Out 0
	ASYNCUSER8_ASYNCUSER80    = 0x1  // Asynchronous User Ch 8 Input Selection - Event Out 0
	ASYNCUSER8_ASYNCUSER81    = 0x2  // Asynchronous User Ch 8 Input Selection - Event Out 0
	ASYNCUSER8_ASYNCUSER82    = 0x4  // Asynchronous User Ch 8 Input Selection - Event Out 0
	ASYNCUSER8_ASYNCUSER83    = 0x8  // Asynchronous User Ch 8 Input Selection - Event Out 0
	ASYNCUSER8_ASYNCUSER84    = 0x10 // Asynchronous User Ch 8 Input Selection - Event Out 0
	ASYNCUSER8_ASYNCUSER85    = 0x20 // Asynchronous User Ch 8 Input Selection - Event Out 0
	ASYNCUSER8_ASYNCUSER86    = 0x40 // Asynchronous User Ch 8 Input Selection - Event Out 0
	ASYNCUSER8_ASYNCUSER87    = 0x80 // Asynchronous User Ch 8 Input Selection - Event Out 0
	ASYNCUSER8_ASYNCUSER8_Msk = 0xff // Asynchronous User Ch 8 Input Selection - Event Out 0

	// ASYNCUSER9: Asynchronous User Ch 9 Input Selection - Event Out 1
	ASYNCUSER9_ASYNCUSER90    = 0x1  // Asynchronous User Ch 9 Input Selection - Event Out 1
	ASYNCUSER9_ASYNCUSER91    = 0x2  // Asynchronous User Ch 9 Input Selection - Event Out 1
	ASYNCUSER9_ASYNCUSER92    = 0x4  // Asynchronous User Ch 9 Input Selection - Event Out 1
	ASYNCUSER9_ASYNCUSER93    = 0x8  // Asynchronous User Ch 9 Input Selection - Event Out 1
	ASYNCUSER9_ASYNCUSER94    = 0x10 // Asynchronous User Ch 9 Input Selection - Event Out 1
	ASYNCUSER9_ASYNCUSER95    = 0x20 // Asynchronous User Ch 9 Input Selection - Event Out 1
	ASYNCUSER9_ASYNCUSER96    = 0x40 // Asynchronous User Ch 9 Input Selection - Event Out 1
	ASYNCUSER9_ASYNCUSER97    = 0x80 // Asynchronous User Ch 9 Input Selection - Event Out 1
	ASYNCUSER9_ASYNCUSER9_Msk = 0xff // Asynchronous User Ch 9 Input Selection - Event Out 1

	// ASYNCUSER10: Asynchronous User Ch 10 Input Selection - Event Out 2
	ASYNCUSER10_ASYNCUSER100    = 0x1  // Asynchronous User Ch 10 Input Selection - Event Out 2
	ASYNCUSER10_ASYNCUSER101    = 0x2  // Asynchronous User Ch 10 Input Selection - Event Out 2
	ASYNCUSER10_ASYNCUSER102    = 0x4  // Asynchronous User Ch 10 Input Selection - Event Out 2
	ASYNCUSER10_ASYNCUSER103    = 0x8  // Asynchronous User Ch 10 Input Selection - Event Out 2
	ASYNCUSER10_ASYNCUSER104    = 0x10 // Asynchronous User Ch 10 Input Selection - Event Out 2
	ASYNCUSER10_ASYNCUSER105    = 0x20 // Asynchronous User Ch 10 Input Selection - Event Out 2
	ASYNCUSER10_ASYNCUSER106    = 0x40 // Asynchronous User Ch 10 Input Selection - Event Out 2
	ASYNCUSER10_ASYNCUSER107    = 0x80 // Asynchronous User Ch 10 Input Selection - Event Out 2
	ASYNCUSER10_ASYNCUSER10_Msk = 0xff // Asynchronous User Ch 10 Input Selection - Event Out 2

	// ASYNCUSER11: Asynchronous User Ch 11 Input Selection - TCB1
	ASYNCUSER11_ASYNCUSER110    = 0x1  // Asynchronous User Ch 11 Input Selection - TCB1
	ASYNCUSER11_ASYNCUSER111    = 0x2  // Asynchronous User Ch 11 Input Selection - TCB1
	ASYNCUSER11_ASYNCUSER112    = 0x4  // Asynchronous User Ch 11 Input Selection - TCB1
	ASYNCUSER11_ASYNCUSER113    = 0x8  // Asynchronous User Ch 11 Input Selection - TCB1
	ASYNCUSER11_ASYNCUSER114    = 0x10 // Asynchronous User Ch 11 Input Selection - TCB1
	ASYNCUSER11_ASYNCUSER115    = 0x20 // Asynchronous User Ch 11 Input Selection - TCB1
	ASYNCUSER11_ASYNCUSER116    = 0x40 // Asynchronous User Ch 11 Input Selection - TCB1
	ASYNCUSER11_ASYNCUSER117    = 0x80 // Asynchronous User Ch 11 Input Selection - TCB1
	ASYNCUSER11_ASYNCUSER11_Msk = 0xff // Asynchronous User Ch 11 Input Selection - TCB1

	// ASYNCUSER12: Asynchronous User Ch 12 Input Selection - ADC1
	ASYNCUSER12_ASYNCUSER120    = 0x1  // Asynchronous User Ch 12 Input Selection - ADC0
	ASYNCUSER12_ASYNCUSER121    = 0x2  // Asynchronous User Ch 12 Input Selection - ADC0
	ASYNCUSER12_ASYNCUSER122    = 0x4  // Asynchronous User Ch 12 Input Selection - ADC0
	ASYNCUSER12_ASYNCUSER123    = 0x8  // Asynchronous User Ch 12 Input Selection - ADC0
	ASYNCUSER12_ASYNCUSER124    = 0x10 // Asynchronous User Ch 12 Input Selection - ADC0
	ASYNCUSER12_ASYNCUSER125    = 0x20 // Asynchronous User Ch 12 Input Selection - ADC0
	ASYNCUSER12_ASYNCUSER126    = 0x40 // Asynchronous User Ch 12 Input Selection - ADC0
	ASYNCUSER12_ASYNCUSER127    = 0x80 // Asynchronous User Ch 12 Input Selection - ADC0
	ASYNCUSER12_ASYNCUSER12_Msk = 0xff // Asynchronous User Ch 12 Input Selection - ADC0

	// SYNCCH0: Synchronous Channel 0 Generator Selection
	SYNCCH0_SYNCCH00    = 0x1  // Synchronous Channel 0 Generator Selection
	SYNCCH0_SYNCCH01    = 0x2  // Synchronous Channel 0 Generator Selection
	SYNCCH0_SYNCCH02    = 0x4  // Synchronous Channel 0 Generator Selection
	SYNCCH0_SYNCCH03    = 0x8  // Synchronous Channel 0 Generator Selection
	SYNCCH0_SYNCCH04    = 0x10 // Synchronous Channel 0 Generator Selection
	SYNCCH0_SYNCCH05    = 0x20 // Synchronous Channel 0 Generator Selection
	SYNCCH0_SYNCCH06    = 0x40 // Synchronous Channel 0 Generator Selection
	SYNCCH0_SYNCCH07    = 0x80 // Synchronous Channel 0 Generator Selection
	SYNCCH0_SYNCCH0_Msk = 0xff // Synchronous Channel 0 Generator Selection

	// SYNCCH1: Synchronous Channel 1 Generator Selection
	SYNCCH1_SYNCCH10    = 0x1  // Synchronous Channel 1 Generator Selection
	SYNCCH1_SYNCCH11    = 0x2  // Synchronous Channel 1 Generator Selection
	SYNCCH1_SYNCCH12    = 0x4  // Synchronous Channel 1 Generator Selection
	SYNCCH1_SYNCCH13    = 0x8  // Synchronous Channel 1 Generator Selection
	SYNCCH1_SYNCCH14    = 0x10 // Synchronous Channel 1 Generator Selection
	SYNCCH1_SYNCCH15    = 0x20 // Synchronous Channel 1 Generator Selection
	SYNCCH1_SYNCCH16    = 0x40 // Synchronous Channel 1 Generator Selection
	SYNCCH1_SYNCCH17    = 0x80 // Synchronous Channel 1 Generator Selection
	SYNCCH1_SYNCCH1_Msk = 0xff // Synchronous Channel 1 Generator Selection

	// SYNCUSER0: Synchronous User Ch 0 - TCA0
	SYNCUSER0_SYNCUSER00    = 0x1  // Synchronous User Ch 0 - TCA0
	SYNCUSER0_SYNCUSER01    = 0x2  // Synchronous User Ch 0 - TCA0
	SYNCUSER0_SYNCUSER02    = 0x4  // Synchronous User Ch 0 - TCA0
	SYNCUSER0_SYNCUSER03    = 0x8  // Synchronous User Ch 0 - TCA0
	SYNCUSER0_SYNCUSER04    = 0x10 // Synchronous User Ch 0 - TCA0
	SYNCUSER0_SYNCUSER05    = 0x20 // Synchronous User Ch 0 - TCA0
	SYNCUSER0_SYNCUSER06    = 0x40 // Synchronous User Ch 0 - TCA0
	SYNCUSER0_SYNCUSER07    = 0x80 // Synchronous User Ch 0 - TCA0
	SYNCUSER0_SYNCUSER0_Msk = 0xff // Synchronous User Ch 0 - TCA0

	// SYNCUSER1: Synchronous User Ch 1 - USART0
	SYNCUSER1_SYNCUSER10    = 0x1  // Synchronous User Ch 1 - USART0
	SYNCUSER1_SYNCUSER11    = 0x2  // Synchronous User Ch 1 - USART0
	SYNCUSER1_SYNCUSER12    = 0x4  // Synchronous User Ch 1 - USART0
	SYNCUSER1_SYNCUSER13    = 0x8  // Synchronous User Ch 1 - USART0
	SYNCUSER1_SYNCUSER14    = 0x10 // Synchronous User Ch 1 - USART0
	SYNCUSER1_SYNCUSER15    = 0x20 // Synchronous User Ch 1 - USART0
	SYNCUSER1_SYNCUSER16    = 0x40 // Synchronous User Ch 1 - USART0
	SYNCUSER1_SYNCUSER17    = 0x80 // Synchronous User Ch 1 - USART0
	SYNCUSER1_SYNCUSER1_Msk = 0xff // Synchronous User Ch 1 - USART0
)

// Bitfields for FUSE: Fuses
const (
	// BODCFG: BOD Configuration
	BODCFG_ACTIVE0      = 0x4  // BOD Operation in Active Mode
	BODCFG_ACTIVE1      = 0x8  // BOD Operation in Active Mode
	BODCFG_ACTIVE_Msk   = 0xc  // BOD Operation in Active Mode
	BODCFG_LVL0         = 0x20 // BOD Level
	BODCFG_LVL1         = 0x40 // BOD Level
	BODCFG_LVL2         = 0x80 // BOD Level
	BODCFG_LVL_Msk      = 0xe0 // BOD Level
	BODCFG_SAMPFREQ     = 0x10 // BOD Sample Frequency
	BODCFG_SAMPFREQ_Msk = 0x10 // BOD Sample Frequency
	BODCFG_SLEEP0       = 0x1  // BOD Operation in Sleep Mode
	BODCFG_SLEEP1       = 0x2  // BOD Operation in Sleep Mode
	BODCFG_SLEEP_Msk    = 0x3  // BOD Operation in Sleep Mode

	// OSCCFG: Oscillator Configuration
	OSCCFG_FREQSEL0    = 0x1  // Frequency Select
	OSCCFG_FREQSEL1    = 0x2  // Frequency Select
	OSCCFG_FREQSEL_Msk = 0x3  // Frequency Select
	OSCCFG_OSCLOCK     = 0x80 // Oscillator Lock
	OSCCFG_OSCLOCK_Msk = 0x80 // Oscillator Lock

	// SYSCFG0: System Configuration 0
	SYSCFG0_CRCSRC0       = 0x40 // CRC Source
	SYSCFG0_CRCSRC1       = 0x80 // CRC Source
	SYSCFG0_CRCSRC_Msk    = 0xc0 // CRC Source
	SYSCFG0_EESAVE        = 0x1  // EEPROM Save
	SYSCFG0_EESAVE_Msk    = 0x1  // EEPROM Save
	SYSCFG0_RSTPINCFG0    = 0x4  // Reset Pin Configuration
	SYSCFG0_RSTPINCFG1    = 0x8  // Reset Pin Configuration
	SYSCFG0_RSTPINCFG_Msk = 0xc  // Reset Pin Configuration

	// SYSCFG1: System Configuration 1
	SYSCFG1_SUT0    = 0x1 // Startup Time
	SYSCFG1_SUT1    = 0x2 // Startup Time
	SYSCFG1_SUT2    = 0x4 // Startup Time
	SYSCFG1_SUT_Msk = 0x7 // Startup Time

	// TCD0CFG: TCD0 Configuration
	TCD0CFG_CMPA       = 0x1  // Compare A Default Output Value
	TCD0CFG_CMPA_Msk   = 0x1  // Compare A Default Output Value
	TCD0CFG_CMPAEN     = 0x10 // Compare A Output Enable
	TCD0CFG_CMPAEN_Msk = 0x10 // Compare A Output Enable
	TCD0CFG_CMPB       = 0x2  // Compare B Default Output Value
	TCD0CFG_CMPB_Msk   = 0x2  // Compare B Default Output Value
	TCD0CFG_CMPBEN     = 0x20 // Compare B Output Enable
	TCD0CFG_CMPBEN_Msk = 0x20 // Compare B Output Enable
	TCD0CFG_CMPC       = 0x4  // Compare C Default Output Value
	TCD0CFG_CMPC_Msk   = 0x4  // Compare C Default Output Value
	TCD0CFG_CMPCEN     = 0x40 // Compare C Output Enable
	TCD0CFG_CMPCEN_Msk = 0x40 // Compare C Output Enable
	TCD0CFG_CMPD       = 0x8  // Compare D Default Output Value
	TCD0CFG_CMPD_Msk   = 0x8  // Compare D Default Output Value
	TCD0CFG_CMPDEN     = 0x80 // Compare D Output Enable
	TCD0CFG_CMPDEN_Msk = 0x80 // Compare D Output Enable

	// WDTCFG: Watchdog Configuration
	WDTCFG_PERIOD0    = 0x1  // Watchdog Timeout Period
	WDTCFG_PERIOD1    = 0x2  // Watchdog Timeout Period
	WDTCFG_PERIOD2    = 0x4  // Watchdog Timeout Period
	WDTCFG_PERIOD3    = 0x8  // Watchdog Timeout Period
	WDTCFG_PERIOD_Msk = 0xf  // Watchdog Timeout Period
	WDTCFG_WINDOW0    = 0x10 // Watchdog Window Timeout Period
	WDTCFG_WINDOW1    = 0x20 // Watchdog Window Timeout Period
	WDTCFG_WINDOW2    = 0x40 // Watchdog Window Timeout Period
	WDTCFG_WINDOW3    = 0x80 // Watchdog Window Timeout Period
	WDTCFG_WINDOW_Msk = 0xf0 // Watchdog Window Timeout Period
)

// Bitfields for LOCKBIT: Lockbit
const (
	// LOCKBIT: Lock bits
	LOCKBIT_LB0    = 0x1  // Lock Bits
	LOCKBIT_LB1    = 0x2  // Lock Bits
	LOCKBIT_LB2    = 0x4  // Lock Bits
	LOCKBIT_LB3    = 0x8  // Lock Bits
	LOCKBIT_LB4    = 0x10 // Lock Bits
	LOCKBIT_LB5    = 0x20 // Lock Bits
	LOCKBIT_LB6    = 0x40 // Lock Bits
	LOCKBIT_LB7    = 0x80 // Lock Bits
	LOCKBIT_LB_Msk = 0xff // Lock Bits
)

// Bitfields for PORT: I/O Ports
const (
	// PIN0CTRL: Pin 0 Control
	PIN0CTRL_INVEN        = 0x80 // Inverted I/O Enable
	PIN0CTRL_INVEN_Msk    = 0x80 // Inverted I/O Enable
	PIN0CTRL_ISC0         = 0x1  // Input/Sense Configuration
	PIN0CTRL_ISC1         = 0x2  // Input/Sense Configuration
	PIN0CTRL_ISC2         = 0x4  // Input/Sense Configuration
	PIN0CTRL_ISC_Msk      = 0x7  // Input/Sense Configuration
	PIN0CTRL_PULLUPEN     = 0x8  // Pullup enable
	PIN0CTRL_PULLUPEN_Msk = 0x8  // Pullup enable

	// PIN1CTRL: Pin 1 Control
	PIN1CTRL_INVEN        = 0x80 // Inverted I/O Enable
	PIN1CTRL_INVEN_Msk    = 0x80 // Inverted I/O Enable
	PIN1CTRL_ISC0         = 0x1  // Input/Sense Configuration
	PIN1CTRL_ISC1         = 0x2  // Input/Sense Configuration
	PIN1CTRL_ISC2         = 0x4  // Input/Sense Configuration
	PIN1CTRL_ISC_Msk      = 0x7  // Input/Sense Configuration
	PIN1CTRL_PULLUPEN     = 0x8  // Pullup enable
	PIN1CTRL_PULLUPEN_Msk = 0x8  // Pullup enable

	// PIN2CTRL: Pin 2 Control
	PIN2CTRL_INVEN        = 0x80 // Inverted I/O Enable
	PIN2CTRL_INVEN_Msk    = 0x80 // Inverted I/O Enable
	PIN2CTRL_ISC0         = 0x1  // Input/Sense Configuration
	PIN2CTRL_ISC1         = 0x2  // Input/Sense Configuration
	PIN2CTRL_ISC2         = 0x4  // Input/Sense Configuration
	PIN2CTRL_ISC_Msk      = 0x7  // Input/Sense Configuration
	PIN2CTRL_PULLUPEN     = 0x8  // Pullup enable
	PIN2CTRL_PULLUPEN_Msk = 0x8  // Pullup enable

	// PIN3CTRL: Pin 3 Control
	PIN3CTRL_INVEN        = 0x80 // Inverted I/O Enable
	PIN3CTRL_INVEN_Msk    = 0x80 // Inverted I/O Enable
	PIN3CTRL_ISC0         = 0x1  // Input/Sense Configuration
	PIN3CTRL_ISC1         = 0x2  // Input/Sense Configuration
	PIN3CTRL_ISC2         = 0x4  // Input/Sense Configuration
	PIN3CTRL_ISC_Msk      = 0x7  // Input/Sense Configuration
	PIN3CTRL_PULLUPEN     = 0x8  // Pullup enable
	PIN3CTRL_PULLUPEN_Msk = 0x8  // Pullup enable

	// PIN4CTRL: Pin 4 Control
	PIN4CTRL_INVEN        = 0x80 // Inverted I/O Enable
	PIN4CTRL_INVEN_Msk    = 0x80 // Inverted I/O Enable
	PIN4CTRL_ISC0         = 0x1  // Input/Sense Configuration
	PIN4CTRL_ISC1         = 0x2  // Input/Sense Configuration
	PIN4CTRL_ISC2         = 0x4  // Input/Sense Configuration
	PIN4CTRL_ISC_Msk      = 0x7  // Input/Sense Configuration
	PIN4CTRL_PULLUPEN     = 0x8  // Pullup enable
	PIN4CTRL_PULLUPEN_Msk = 0x8  // Pullup enable

	// PIN5CTRL: Pin 5 Control
	PIN5CTRL_INVEN        = 0x80 // Inverted I/O Enable
	PIN5CTRL_INVEN_Msk    = 0x80 // Inverted I/O Enable
	PIN5CTRL_ISC0         = 0x1  // Input/Sense Configuration
	PIN5CTRL_ISC1         = 0x2  // Input/Sense Configuration
	PIN5CTRL_ISC2         = 0x4  // Input/Sense Configuration
	PIN5CTRL_ISC_Msk      = 0x7  // Input/Sense Configuration
	PIN5CTRL_PULLUPEN     = 0x8  // Pullup enable
	PIN5CTRL_PULLUPEN_Msk = 0x8  // Pullup enable

	// PIN6CTRL: Pin 6 Control
	PIN6CTRL_INVEN        = 0x80 // Inverted I/O Enable
	PIN6CTRL_INVEN_Msk    = 0x80 // Inverted I/O Enable
	PIN6CTRL_ISC0         = 0x1  // Input/Sense Configuration
	PIN6CTRL_ISC1         = 0x2  // Input/Sense Configuration
	PIN6CTRL_ISC2         = 0x4  // Input/Sense Configuration
	PIN6CTRL_ISC_Msk      = 0x7  // Input/Sense Configuration
	PIN6CTRL_PULLUPEN     = 0x8  // Pullup enable
	PIN6CTRL_PULLUPEN_Msk = 0x8  // Pullup enable

	// PIN7CTRL: Pin 7 Control
	PIN7CTRL_INVEN        = 0x80 // Inverted I/O Enable
	PIN7CTRL_INVEN_Msk    = 0x80 // Inverted I/O Enable
	PIN7CTRL_ISC0         = 0x1  // Input/Sense Configuration
	PIN7CTRL_ISC1         = 0x2  // Input/Sense Configuration
	PIN7CTRL_ISC2         = 0x4  // Input/Sense Configuration
	PIN7CTRL_ISC_Msk      = 0x7  // Input/Sense Configuration
	PIN7CTRL_PULLUPEN     = 0x8  // Pullup enable
	PIN7CTRL_PULLUPEN_Msk = 0x8  // Pullup enable
)

// Bitfields for RSTCTRL: Reset controller
const (
	// RSTFR: Reset Flags
	RSTFR_BORF       = 0x2  // Brown out detector Reset flag
	RSTFR_BORF_Msk   = 0x2  // Brown out detector Reset flag
	RSTFR_EXTRF      = 0x4  // External Reset flag
	RSTFR_EXTRF_Msk  = 0x4  // External Reset flag
	RSTFR_PORF       = 0x1  // Power on Reset flag
	RSTFR_PORF_Msk   = 0x1  // Power on Reset flag
	RSTFR_SWRF       = 0x10 // Software Reset flag
	RSTFR_SWRF_Msk   = 0x10 // Software Reset flag
	RSTFR_UPDIRF     = 0x20 // UPDI Reset flag
	RSTFR_UPDIRF_Msk = 0x20 // UPDI Reset flag
	RSTFR_WDRF       = 0x8  // Watch dog Reset flag
	RSTFR_WDRF_Msk   = 0x8  // Watch dog Reset flag

	// SWRR: Software Reset
	SWRR_SWRE     = 0x1 // Software reset enable
	SWRR_SWRE_Msk = 0x1 // Software reset enable
)

// Bitfields for RTC: Real-Time Counter
const (
	// CLKSEL: Clock Select
	CLKSEL_CLKSEL0    = 0x1 // Clock Select
	CLKSEL_CLKSEL1    = 0x2 // Clock Select
	CLKSEL_CLKSEL_Msk = 0x3 // Clock Select

	// PITCTRLA: PIT Control A
	PITCTRLA_PERIOD0    = 0x8  // Period
	PITCTRLA_PERIOD1    = 0x10 // Period
	PITCTRLA_PERIOD2    = 0x20 // Period
	PITCTRLA_PERIOD3    = 0x40 // Period
	PITCTRLA_PERIOD_Msk = 0x78 // Period
	PITCTRLA_PITEN      = 0x1  // Enable
	PITCTRLA_PITEN_Msk  = 0x1  // Enable

	// PITDBGCTRL: PIT Debug control
	PITDBGCTRL_DBGRUN     = 0x1 // Run in debug
	PITDBGCTRL_DBGRUN_Msk = 0x1 // Run in debug

	// PITINTCTRL: PIT Interrupt Control
	PITINTCTRL_PI     = 0x1 // Periodic Interrupt
	PITINTCTRL_PI_Msk = 0x1 // Periodic Interrupt

	// PITINTFLAGS: PIT Interrupt Flags
	PITINTFLAGS_PI     = 0x1 // Periodic Interrupt
	PITINTFLAGS_PI_Msk = 0x1 // Periodic Interrupt

	// PITSTATUS: PIT Status
	PITSTATUS_CTRLBUSY     = 0x1 // CTRLA Synchronization Busy Flag
	PITSTATUS_CTRLBUSY_Msk = 0x1 // CTRLA Synchronization Busy Flag
)

// Bitfields for SYSCFG: System Configuration Registers
const (
	// EXTBRK: External Break
	EXTBRK_ENEXTBRK     = 0x1 // External break enable
	EXTBRK_ENEXTBRK_Msk = 0x1 // External break enable
)

// Bitfields for TCA: 16-bit Timer/Counter Type A
const (
	// CTRLECLR: Control E Clear
	CTRLECLR_CMD0     = 0x4 // Command
	CTRLECLR_CMD1     = 0x8 // Command
	CTRLECLR_CMD_Msk  = 0xc // Command
	CTRLECLR_DIR      = 0x1 // Direction
	CTRLECLR_DIR_Msk  = 0x1 // Direction
	CTRLECLR_LUPD     = 0x2 // Lock Update
	CTRLECLR_LUPD_Msk = 0x2 // Lock Update

	// CTRLESET: Control E Set
	CTRLESET_CMD0     = 0x4 // Command
	CTRLESET_CMD1     = 0x8 // Command
	CTRLESET_CMD_Msk  = 0xc // Command
	CTRLESET_DIR      = 0x1 // Direction
	CTRLESET_DIR_Msk  = 0x1 // Direction
	CTRLESET_LUPD     = 0x2 // Lock Update
	CTRLESET_LUPD_Msk = 0x2 // Lock Update

	// CTRLFCLR: Control F Clear
	CTRLFCLR_CMP0BV     = 0x2 // Compare 0 Buffer Valid
	CTRLFCLR_CMP0BV_Msk = 0x2 // Compare 0 Buffer Valid
	CTRLFCLR_CMP1BV     = 0x4 // Compare 1 Buffer Valid
	CTRLFCLR_CMP1BV_Msk = 0x4 // Compare 1 Buffer Valid
	CTRLFCLR_CMP2BV     = 0x8 // Compare 2 Buffer Valid
	CTRLFCLR_CMP2BV_Msk = 0x8 // Compare 2 Buffer Valid
	CTRLFCLR_PERBV      = 0x1 // Period Buffer Valid
	CTRLFCLR_PERBV_Msk  = 0x1 // Period Buffer Valid

	// CTRLFSET: Control F Set
	CTRLFSET_CMP0BV     = 0x2 // Compare 0 Buffer Valid
	CTRLFSET_CMP0BV_Msk = 0x2 // Compare 0 Buffer Valid
	CTRLFSET_CMP1BV     = 0x4 // Compare 1 Buffer Valid
	CTRLFSET_CMP1BV_Msk = 0x4 // Compare 1 Buffer Valid
	CTRLFSET_CMP2BV     = 0x8 // Compare 2 Buffer Valid
	CTRLFSET_CMP2BV_Msk = 0x8 // Compare 2 Buffer Valid
	CTRLFSET_PERBV      = 0x1 // Period Buffer Valid
	CTRLFSET_PERBV_Msk  = 0x1 // Period Buffer Valid
)

// Bitfields for TCD: Timer Counter D
const (
	// DITCTRL: Dither Control A
	DITCTRL_DITHERSEL0    = 0x1 // dither select
	DITCTRL_DITHERSEL1    = 0x2 // dither select
	DITCTRL_DITHERSEL_Msk = 0x3 // dither select

	// DITVAL: Dither value
	DITVAL_DITHER0    = 0x1 // Dither value
	DITVAL_DITHER1    = 0x2 // Dither value
	DITVAL_DITHER2    = 0x4 // Dither value
	DITVAL_DITHER3    = 0x8 // Dither value
	DITVAL_DITHER_Msk = 0xf // Dither value

	// DLYCTRL: Delay Control
	DLYCTRL_DLYPRESC0    = 0x10 // Delay prescaler
	DLYCTRL_DLYPRESC1    = 0x20 // Delay prescaler
	DLYCTRL_DLYPRESC_Msk = 0x30 // Delay prescaler
	DLYCTRL_DLYSEL0      = 0x1  // Delay select
	DLYCTRL_DLYSEL1      = 0x2  // Delay select
	DLYCTRL_DLYSEL_Msk   = 0x3  // Delay select
	DLYCTRL_DLYTRIG0     = 0x4  // Delay trigger
	DLYCTRL_DLYTRIG1     = 0x8  // Delay trigger
	DLYCTRL_DLYTRIG_Msk  = 0xc  // Delay trigger

	// DLYVAL: Delay value
	DLYVAL_DLYVAL0    = 0x1  // Delay value
	DLYVAL_DLYVAL1    = 0x2  // Delay value
	DLYVAL_DLYVAL2    = 0x4  // Delay value
	DLYVAL_DLYVAL3    = 0x8  // Delay value
	DLYVAL_DLYVAL4    = 0x10 // Delay value
	DLYVAL_DLYVAL5    = 0x20 // Delay value
	DLYVAL_DLYVAL6    = 0x40 // Delay value
	DLYVAL_DLYVAL7    = 0x80 // Delay value
	DLYVAL_DLYVAL_Msk = 0xff // Delay value

	// EVCTRLA: EVCTRLA
	EVCTRLA_ACTION     = 0x4  // event action
	EVCTRLA_ACTION_Msk = 0x4  // event action
	EVCTRLA_CFG0       = 0x40 // event config
	EVCTRLA_CFG1       = 0x80 // event config
	EVCTRLA_CFG_Msk    = 0xc0 // event config
	EVCTRLA_EDGE       = 0x10 // edge select
	EVCTRLA_EDGE_Msk   = 0x10 // edge select
	EVCTRLA_TRIGEI     = 0x1  // Trigger event enable
	EVCTRLA_TRIGEI_Msk = 0x1  // Trigger event enable

	// EVCTRLB: EVCTRLB
	EVCTRLB_ACTION     = 0x4  // event action
	EVCTRLB_ACTION_Msk = 0x4  // event action
	EVCTRLB_CFG0       = 0x40 // event config
	EVCTRLB_CFG1       = 0x80 // event config
	EVCTRLB_CFG_Msk    = 0xc0 // event config
	EVCTRLB_EDGE       = 0x10 // edge select
	EVCTRLB_EDGE_Msk   = 0x10 // edge select
	EVCTRLB_TRIGEI     = 0x1  // Trigger event enable
	EVCTRLB_TRIGEI_Msk = 0x1  // Trigger event enable

	// FAULTCTRL: Fault Control
	FAULTCTRL_CMPA       = 0x1  // Compare A value
	FAULTCTRL_CMPA_Msk   = 0x1  // Compare A value
	FAULTCTRL_CMPAEN     = 0x10 // Compare A enable
	FAULTCTRL_CMPAEN_Msk = 0x10 // Compare A enable
	FAULTCTRL_CMPB       = 0x2  // Compare B value
	FAULTCTRL_CMPB_Msk   = 0x2  // Compare B value
	FAULTCTRL_CMPBEN     = 0x20 // Compare B enable
	FAULTCTRL_CMPBEN_Msk = 0x20 // Compare B enable
	FAULTCTRL_CMPC       = 0x4  // Compare C value
	FAULTCTRL_CMPC_Msk   = 0x4  // Compare C value
	FAULTCTRL_CMPCEN     = 0x40 // Compare C enable
	FAULTCTRL_CMPCEN_Msk = 0x40 // Compare C enable
	FAULTCTRL_CMPD       = 0x8  // Compare D vaule
	FAULTCTRL_CMPD_Msk   = 0x8  // Compare D vaule
	FAULTCTRL_CMPDEN     = 0x80 // Compare D enable
	FAULTCTRL_CMPDEN_Msk = 0x80 // Compare D enable

	// INPUTCTRLA: Input Control A
	INPUTCTRLA_INPUTMODE0    = 0x1 // Input mode
	INPUTCTRLA_INPUTMODE1    = 0x2 // Input mode
	INPUTCTRLA_INPUTMODE2    = 0x4 // Input mode
	INPUTCTRLA_INPUTMODE3    = 0x8 // Input mode
	INPUTCTRLA_INPUTMODE_Msk = 0xf // Input mode

	// INPUTCTRLB: Input Control B
	INPUTCTRLB_INPUTMODE0    = 0x1 // Input mode
	INPUTCTRLB_INPUTMODE1    = 0x2 // Input mode
	INPUTCTRLB_INPUTMODE2    = 0x4 // Input mode
	INPUTCTRLB_INPUTMODE3    = 0x8 // Input mode
	INPUTCTRLB_INPUTMODE_Msk = 0xf // Input mode
)

// Bitfields for TWI: Two-Wire Interface
const (
	// MCTRLA: Master Control A
	MCTRLA_ENABLE      = 0x1  // Enable TWI Master
	MCTRLA_ENABLE_Msk  = 0x1  // Enable TWI Master
	MCTRLA_QCEN        = 0x10 // Quick Command Enable
	MCTRLA_QCEN_Msk    = 0x10 // Quick Command Enable
	MCTRLA_RIEN        = 0x80 // Read Interrupt Enable
	MCTRLA_RIEN_Msk    = 0x80 // Read Interrupt Enable
	MCTRLA_SMEN        = 0x2  // Smart Mode Enable
	MCTRLA_SMEN_Msk    = 0x2  // Smart Mode Enable
	MCTRLA_TIMEOUT0    = 0x4  // Inactive Bus Timeout
	MCTRLA_TIMEOUT1    = 0x8  // Inactive Bus Timeout
	MCTRLA_TIMEOUT_Msk = 0xc  // Inactive Bus Timeout
	MCTRLA_WIEN        = 0x40 // Write Interrupt Enable
	MCTRLA_WIEN_Msk    = 0x40 // Write Interrupt Enable

	// MCTRLB: Master Control B
	MCTRLB_ACKACT     = 0x4 // Acknowledge Action
	MCTRLB_ACKACT_Msk = 0x4 // Acknowledge Action
	MCTRLB_FLUSH      = 0x8 // Flush
	MCTRLB_FLUSH_Msk  = 0x8 // Flush
	MCTRLB_MCMD0      = 0x1 // Command
	MCTRLB_MCMD1      = 0x2 // Command
	MCTRLB_MCMD_Msk   = 0x3 // Command

	// MSTATUS: Master Status
	MSTATUS_ARBLOST      = 0x8  // Arbitration Lost
	MSTATUS_ARBLOST_Msk  = 0x8  // Arbitration Lost
	MSTATUS_BUSERR       = 0x4  // Bus Error
	MSTATUS_BUSERR_Msk   = 0x4  // Bus Error
	MSTATUS_BUSSTATE0    = 0x1  // Bus State
	MSTATUS_BUSSTATE1    = 0x2  // Bus State
	MSTATUS_BUSSTATE_Msk = 0x3  // Bus State
	MSTATUS_CLKHOLD      = 0x20 // Clock Hold
	MSTATUS_CLKHOLD_Msk  = 0x20 // Clock Hold
	MSTATUS_RIF          = 0x80 // Read Interrupt Flag
	MSTATUS_RIF_Msk      = 0x80 // Read Interrupt Flag
	MSTATUS_RXACK        = 0x10 // Received Acknowledge
	MSTATUS_RXACK_Msk    = 0x10 // Received Acknowledge
	MSTATUS_WIF          = 0x40 // Write Interrupt Flag
	MSTATUS_WIF_Msk      = 0x40 // Write Interrupt Flag

	// SADDRMASK: Slave Address Mask
	SADDRMASK_ADDREN       = 0x1  // Address Enable
	SADDRMASK_ADDREN_Msk   = 0x1  // Address Enable
	SADDRMASK_ADDRMASK0    = 0x2  // Address Mask
	SADDRMASK_ADDRMASK1    = 0x4  // Address Mask
	SADDRMASK_ADDRMASK2    = 0x8  // Address Mask
	SADDRMASK_ADDRMASK3    = 0x10 // Address Mask
	SADDRMASK_ADDRMASK4    = 0x20 // Address Mask
	SADDRMASK_ADDRMASK5    = 0x40 // Address Mask
	SADDRMASK_ADDRMASK6    = 0x80 // Address Mask
	SADDRMASK_ADDRMASK_Msk = 0xfe // Address Mask

	// SCTRLA: Slave Control A
	SCTRLA_APIEN      = 0x40 // Address/Stop Interrupt Enable
	SCTRLA_APIEN_Msk  = 0x40 // Address/Stop Interrupt Enable
	SCTRLA_DIEN       = 0x80 // Data Interrupt Enable
	SCTRLA_DIEN_Msk   = 0x80 // Data Interrupt Enable
	SCTRLA_ENABLE     = 0x1  // Enable TWI Slave
	SCTRLA_ENABLE_Msk = 0x1  // Enable TWI Slave
	SCTRLA_PIEN       = 0x20 // Stop Interrupt Enable
	SCTRLA_PIEN_Msk   = 0x20 // Stop Interrupt Enable
	SCTRLA_PMEN       = 0x4  // Promiscuous Mode Enable
	SCTRLA_PMEN_Msk   = 0x4  // Promiscuous Mode Enable
	SCTRLA_SMEN       = 0x2  // Smart Mode Enable
	SCTRLA_SMEN_Msk   = 0x2  // Smart Mode Enable

	// SCTRLB: Slave Control B
	SCTRLB_ACKACT     = 0x4 // Acknowledge Action
	SCTRLB_ACKACT_Msk = 0x4 // Acknowledge Action
	SCTRLB_SCMD0      = 0x1 // Command
	SCTRLB_SCMD1      = 0x2 // Command
	SCTRLB_SCMD_Msk   = 0x3 // Command

	// SSTATUS: Slave Status
	SSTATUS_AP          = 0x1  // Slave Address or Stop
	SSTATUS_AP_Msk      = 0x1  // Slave Address or Stop
	SSTATUS_APIF        = 0x40 // Address/Stop Interrupt Flag
	SSTATUS_APIF_Msk    = 0x40 // Address/Stop Interrupt Flag
	SSTATUS_BUSERR      = 0x4  // Bus Error
	SSTATUS_BUSERR_Msk  = 0x4  // Bus Error
	SSTATUS_CLKHOLD     = 0x20 // Clock Hold
	SSTATUS_CLKHOLD_Msk = 0x20 // Clock Hold
	SSTATUS_COLL        = 0x8  // Collision
	SSTATUS_COLL_Msk    = 0x8  // Collision
	SSTATUS_DIF         = 0x80 // Data Interrupt Flag
	SSTATUS_DIF_Msk     = 0x80 // Data Interrupt Flag
	SSTATUS_DIR         = 0x2  // Read/Write Direction
	SSTATUS_DIR_Msk     = 0x2  // Read/Write Direction
	SSTATUS_RXACK       = 0x10 // Received Acknowledge
	SSTATUS_RXACK_Msk   = 0x10 // Received Acknowledge
)

// Bitfields for USART: Universal Synchronous and Asynchronous Receiver and Transmitter
const (
	// RXDATAH: Receive Data High Byte
	RXDATAH_BUFOVF     = 0x40 // Buffer Overflow
	RXDATAH_BUFOVF_Msk = 0x40 // Buffer Overflow
	RXDATAH_DATA8      = 0x1  // Receiver Data Register
	RXDATAH_DATA8_Msk  = 0x1  // Receiver Data Register
	RXDATAH_FERR       = 0x4  // Frame Error
	RXDATAH_FERR_Msk   = 0x4  // Frame Error
	RXDATAH_PERR       = 0x2  // Parity Error
	RXDATAH_PERR_Msk   = 0x2  // Parity Error
	RXDATAH_RXCIF      = 0x80 // Receive Complete Interrupt Flag
	RXDATAH_RXCIF_Msk  = 0x80 // Receive Complete Interrupt Flag

	// RXDATAL: Receive Data Low Byte
	RXDATAL_DATA0    = 0x1  // RX Data
	RXDATAL_DATA1    = 0x2  // RX Data
	RXDATAL_DATA2    = 0x4  // RX Data
	RXDATAL_DATA3    = 0x8  // RX Data
	RXDATAL_DATA4    = 0x10 // RX Data
	RXDATAL_DATA5    = 0x20 // RX Data
	RXDATAL_DATA6    = 0x40 // RX Data
	RXDATAL_DATA7    = 0x80 // RX Data
	RXDATAL_DATA_Msk = 0xff // RX Data

	// RXPLCTRL: IRCOM Receiver Pulse Length Control
	RXPLCTRL_RXPL0    = 0x1  // Receiver Pulse Lenght
	RXPLCTRL_RXPL1    = 0x2  // Receiver Pulse Lenght
	RXPLCTRL_RXPL2    = 0x4  // Receiver Pulse Lenght
	RXPLCTRL_RXPL3    = 0x8  // Receiver Pulse Lenght
	RXPLCTRL_RXPL4    = 0x10 // Receiver Pulse Lenght
	RXPLCTRL_RXPL5    = 0x20 // Receiver Pulse Lenght
	RXPLCTRL_RXPL6    = 0x40 // Receiver Pulse Lenght
	RXPLCTRL_RXPL_Msk = 0x7f // Receiver Pulse Lenght

	// TXDATAH: Transmit Data High Byte
	TXDATAH_DATA8     = 0x1 // Transmit Data Register (CHSIZE=9bit)
	TXDATAH_DATA8_Msk = 0x1 // Transmit Data Register (CHSIZE=9bit)

	// TXDATAL: Transmit Data Low Byte
	TXDATAL_DATA0    = 0x1  // Transmit Data Register
	TXDATAL_DATA1    = 0x2  // Transmit Data Register
	TXDATAL_DATA2    = 0x4  // Transmit Data Register
	TXDATAL_DATA3    = 0x8  // Transmit Data Register
	TXDATAL_DATA4    = 0x10 // Transmit Data Register
	TXDATAL_DATA5    = 0x20 // Transmit Data Register
	TXDATAL_DATA6    = 0x40 // Transmit Data Register
	TXDATAL_DATA7    = 0x80 // Transmit Data Register
	TXDATAL_DATA_Msk = 0xff // Transmit Data Register

	// TXPLCTRL: IRCOM Transmitter Pulse Length Control
	TXPLCTRL_TXPL0    = 0x1  // Transmit pulse length
	TXPLCTRL_TXPL1    = 0x2  // Transmit pulse length
	TXPLCTRL_TXPL2    = 0x4  // Transmit pulse length
	TXPLCTRL_TXPL3    = 0x8  // Transmit pulse length
	TXPLCTRL_TXPL4    = 0x10 // Transmit pulse length
	TXPLCTRL_TXPL5    = 0x20 // Transmit pulse length
	TXPLCTRL_TXPL6    = 0x40 // Transmit pulse length
	TXPLCTRL_TXPL7    = 0x80 // Transmit pulse length
	TXPLCTRL_TXPL_Msk = 0xff // Transmit pulse length
)
